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TMS320C31PQL60 Scheda tecnica(PDF) 45 Page - Texas Instruments

Il numero della parte TMS320C31PQL60
Spiegazioni elettronici  DIGITAL SIGNAL PROCESSORS
PDF  48 Pages
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TMS320C31PQL60 Scheda tecnica(HTML) 45 Page - Texas Instruments

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TMS320C31, TMS320LC31
DIGITAL SIGNAL PROCESSORS
SPRS035B – MARCH 1996 – REVISED JANUARY 1999
45
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
timer pin timing (continued)
90
90
89
Peripheral
Pin
(see Note A)
H1
H3
88
91
92
NOTE A: HOLDA goes low in response to HOLD going low and continues to remain low until one H1 cycle
after HOLD goes back high.
Figure 31. Timing for Timer Pin
SHZ pin timing
The following table defines the timing parameter for the SHZ pin. The number shown in Figure 32 corresponds
with that in the NO. column of the table below.
timing parameters for SHZ (see Figure 32)
NO.
’C31
’LC31
UNIT
MIN
MAX
93
tdis(SHZ)
Disable time, SHZ low to all O, I/O pins disabled (high impedance)
0†
2P†‡
ns
† This value is characterized but not tested
‡ P = tc(CI)
93
H3
H1
SHZ
All I/O Pins
NOTE A: Enabling SHZ destroys TMS320C3x register and memory contents.
Assert SHZ = 1 and reset the TMS320C3x to restore it to a known
condition.
Figure 32. Timing for SHZ



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