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Motore di ricerca datesheet componenti elettronici |
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TMS320C31PQL60 Scheda tecnica(PDF) 24 Page - Texas Instruments |
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TMS320C31PQL60 Scheda tecnica(HTML) 24 Page - Texas Instruments |
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24 / 48 page  TMS320C31, TMS320LC31 DIGITAL SIGNAL PROCESSORS SPRS035B – MARCH 1996 – REVISED JANUARY 1999 24 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 loading when XF is configured as an output The following table defines the timing parameter for loading the XF register when the XFx pin is configured as an output. The number shown in Figure 18 corresponds with the number in the NO. column of the table below. timing parameters for loading the XF register when configured as an output pin (see Figure 18) NO. ’LC31-33 ’C31-40 ’LC31-40 ’C31-50 ’C31-60 ’C31-80 UNIT MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX 33 tv(H3H-XF) Valid time, H3 high to XFx 15 13 12 11 8 ns Fetch Load Decode Read Execute H3 H1 OUTXFx Bit (see Note A) XFx Pin 1 or 0 33 Instruction NOTE A: OUTXFx represents either bit 2 or 6 of the IOF register. Figure 18. Timing for Loading XF Register When Configured as an Output Pin |
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