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TAS3108DCPR Scheda tecnica(PDF) 28 Page - Texas Instruments

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Il numero della parte TAS3108DCPR
Spiegazioni elettronici  AUDIO DIGITAL SIGNAL PROCESSORS
PDF  63 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TAS3108DCPR Scheda tecnica(HTML) 28 Page - Texas Instruments

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SDA
SCL
C
S
1
S
Start
(By Master)
Slave Address
(By Master)
0
1
1
0
1
C
S
0
Read or Write
(By Master)
R
/
W
A
C
K
M
S
B
Acknowledge
(By TAS3108/TAS3108IA)
L
S
B
Data Byte
(By Transmitter)
A
C
K
Acknowledge
(By Receiver)
M
S
B
L
S
B
Data Byte
(By Transmitter)
A
C
K
Acknowledge
(By Receiver)
S
Stop
(By Master)
MSB
MSB−1 MSB−2
LSB
Start Condition
SDA
↓ While SCL = 1
Stop Condition
SDA
↑ While SCL = 1
T0087−01
(1)
6.1 General I
2C Operations
TAS3108, TAS3108IA
AUDIO DIGITAL SIGNAL PROCESSORS
SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007
Figure 6-1. I2C Slave-Mode Communication Protocol
As shown in Figure 6-2, an I2C read transaction requires that the master device first issue a write
transaction to give the TAS3108/TAS3108IA the subaddress to be used in the read transaction that
follows. This subaddress assignment write transaction is then followed by the read transaction. For write
transactions, the subaddress is supplied in the first byte of data written, and this byte is followed by the
data to be written. For I2C write transactions, the subaddress must always be included in the data written.
There cannot be a separate write transaction to supply the subaddress, as was required for read
transactions. If a subaddress assignment-only write transaction is followed by a second write transaction
supplying the data, erroneous behavior results. The first byte in the second write transaction is interpreted
by the TAS3108/TAS3108IA as another subaddress replacing the one previously written.
Microprocessor Controller
28
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