ST16C552AIJ68 datasheet(12/39 Pages) EXAR

Il numero della parte	ST16C552AIJ68

Spiegazioni elettronici	DUAL UART WITH 16-BYTE FIFO AND PARALLEL PRINTER PORT

PDF	39 Pages

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Produttore elettronici	EXAR [Exar Corporation]

Homepage	http://www.exar.com

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ST16C552/552A

Rev. 3.40

same system design. The rate table is configured via the

DLL and DLM internal register functions. Customized

Baud Rates can be achieved by selecting the proper

divisor values for the MSB and LSB sections of baud rate

generator.

Programming the Baud Rate Generator Registers

DLM (MSB) and DLL (LSB) provides a user capability

for selecting the desired final baud rate. The example in

Table 5 below, shows the selectable baud rate table

available when using a 1.8432 MHz external clock

input.

Table 5, BAUD RATE GENERATOR PROGRAMMING TABLE (1.8432 MHz CLOCK):

Output

User

DLM

DLL

Baud Rate

16 x Clock

Program

MCR

Divisor

Value

(Decimal)

(HEX)

2304

900

110

1047

417

150

768

300

384

180

600

192

1200

2400

4800

7200

9600

19.2k

38.4k

57.6k

115.2k

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