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OPA820SKGD3 Scheda tecnica(PDF) 18 Page - Texas Instruments |
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OPA820SKGD3 Scheda tecnica(HTML) 18 Page - Texas Instruments |
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18 / 32 page ![]() O P A820 +5V +V S DIS 100Ω R G 402Ω 806Ω 806Ω 57.6Ω 0.01µF 6.8µF 0.1µF 0.01µF V I 50Ω Source R F 402Ω V V O S/2 OPA820 +5V +V S DIS 100Ω R G 402Ω 806Ω 806Ω 0.01µF 0.01µF V I R F 402Ω V V O S/2 6.8µF 0.1µF OPA820-HT SBOS587 – DECEMBER 2011 www.ti.com signal range. The input impedance matching resistor (57.6 Ω) used in Figure 4 is adjusted to give a 50-Ω input match when the parallel combination of the biasing divider network is included. The gain resistor (RG) is AC-coupled, giving the circuit a DC gain of +1. This puts the input DC bias voltage (2.5 V) on the output as well. On a single 5-V supply, the output voltage can swing to within 1.3 V of either supply pin while delivering more than 80-mA output current giving 2.4-V output swing into 100 Ω (5.6-dBm maximum at the matched load). Figure 5 shows the AC-coupled, single 5-V supply, gain of −1 V/V circuit configuration used as a basis for the 5 V only Typical Characteristic curves. In this case, the midpoint DC bias on the noninverting input is also decoupled with an additional 0.01- μF decoupling capacitor. This reduces the source impedance at higher frequencies for the noninverting input bias current noise. This 2.5-V bias on the noninverting input pin appears on the inverting input pin and, since RG is DC blocked by the input capacitor, will also appear at the output pin. The single-supply test circuits of Figure 4 and Figure 4 show 5-V operation. These same circuits can be used over a singlesupply range of 5 V to 12 V. Operating on a single 12-V supply, with the Absolute Maximum Supply voltage specification of 13 V, gives adequate design margin for the typical ±5% supply tolerance. Figure 4. AC-Coupled, G = +2 V/V, Single-Supply Specifications and Test Circuit Figure 5. AC-Coupled, G = −1 V/V, Single-Supply Specifications and Test Circuit Buffering High-Performance ADCs To achieve full performance from a high dynamic range ADC, considerable care must be exercised in the design of the input amplifier interface circuit. The example circuit on the front page shows a typical AC-coupled interface to a very high dynamic range converter. This AC-coupled example allows the OPA820 to be operated using a signal range that swings symmetrically around ground (0 V). The 2VPP swing is then level-shifted through the blocking capacitor to a midscale reference level, which is created by a well-decoupled resistive divider off the converter ’s internal reference voltages. To have a negligible effect (1 dB) on the rated spurious-free dynamic range (SFDR) of the converter, the amplifier ’s SFDR should be at least 18 dB greater than the converter. The OPA820 has minimal effect on the rated distortion of the ADS850, given its 79-dB SFDR at 2VPP, 1 MHz. The 18 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA820-HT |
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