CIC60311

69µm

45µm

1094µm

654µm

0

0

OPA820-HT

SBOS587

– DECEMBER 2011

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

BARE DIE INFORMATION

BACKSIDE

BOND PAD

BOND PAD

DIE THICKNESS

BACKSIDE FINISH

POTENTIAL

METALLIZATION COMPOSITION

THICKNESS

15 mils.

Silicon with backgrind

Floating

TiW/AlCu (0.5%)

1100 nm

Table 1. Bond Pad Coordinates in Microns

DISCRIPTION

PAD NUMBER

X MIN

Y MIN

X MAX

Y MAX

Inverting Input

1

27

439

125

537

NonInverting Input

2

27

125

125

125

Output

3

831

27

929

125

4

831

233

929

331

5

831

439

929

537

ORDERABLE PART NUMBER

TOP-SIDE MARKING

–55°C to 210°C

KGD (bare die)

OPA820SKD3

NA

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

2

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Copyright

© 2011, Texas Instruments Incorporated

Product Folder Link(s): OPA820-HT