AS4DDR232M72APBG datasheet(1/28 Pages) MICROSS

Il numero della parte	AS4DDR232M72APBG

Spiegazioni elettronici	4-bit prefetch architecture

PDF	28 Pages

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Produttore elettronici	MICROSS [Micross Components]

Homepage	http://www.micross.com

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iPEM

2.4 Gb SDRAM-DDR2

AS4DDR232M72APBG

Rev. 1.1 12/12

1

Micross Components reserves the right to change products or specifications without notice.

32Mx72 DDR2 SDRAM

iNTEGRATED Plastic Encapsulated Microcircuit

FEATURES



DDR2 Data rate = 667, 533, 400



Available in Industrial, Enhanced and Military Temp



Package:

• 255 Plastic Ball Grid Array (PBGA), 25 x 32mm

• 1.27mm pitch



Differential data strobe (DQS, DQS#) per byte



Internal, pipelined, double data rate architecture



4-bit prefetch architecture



DLL for alignment of DQ and DQS transitions with

clock signal



Four internal banks for concurrent operation

(Per DDR2 SDRAM Die)



Programmable Burst lengths: 4 or 8



Auto Refresh and Self Refresh Modes



On Die Termination (ODT)



Adjustable data – output drive strength



1.8V ±0.1V power supply and I/O (VCC/VCCQ)



Programmable CAS latency: 3, 4, 5, or 6



Posted CAS additive latency: 0, 1, 2, 3 or 4



Write latency = Read latency - 1* tCK



Organized as 32M x 72 w/ support for x80



Weight: AS4DDR232M72APBG ~ 3.5 grams typical

NOTE: Self Refresh Mode available on Industrial and Enhanced temp. only

BENEFITS



SPACEconsciousPBGAdefinedforeasy

SMT manufacturability (50 mil ball pitch)



Reduced part count



47% I/O reduction vs Individual CSP approach



Reduced trace lengths for lower parasitic

capacitance



Suitable for hi-reliability applications



Upgradable to 64M x 72 density

(consult factory for info on

AS4DDR264M72PBG)

FUNCTIONAL BLOCK DIAGRAM

ODT

VRef

VCC

VCCQ

VSS

VSSQ

VCCL

VSSDL

VCCL

VSSDL

VCCL

VSSDL

VCCL

VSSDL

VCCL

VSSDL

CS0\

CS1\

CS2\

CS3\

CS4\

Ax, BA0-1

UDMx, LDMx

UDSQx,UDSQx\

LDSQx, LDSQx\

3

2

3

2

3

2

3

2

3

2

RASx\,CASx\,WEx\

CKx,CKx\,CKEx

3

A

B

CD

DQ0-15

DQ16-31

DQ32-47

DQ48-63

A

B

C

D

DQ64-79

Configuration Addressing

Parameter

32 Meg x 72

Configuration

8 Meg x 16 x 4 Banks

Refresh Count

8K

Row Address

8K (A0‐A12)

Bank Address

4 (BA0‐BA1)

Column Address

1K (A0‐A9)

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Austin Semiconductor	AS4DDR232M72PBG	247Kb / 28P	32Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
	AS4DDR232M72PBG-3/ET	247Kb / 28P	32Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
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