STGAP1STR datasheet(11/67 Pages) STMICROELECTRONICS

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STGAP1S

Electrical data

3.1

Absolute maximum ratings

Table 2. Absolute maximum ratings

Symbol

Parameter

Test condition

Min.

Max.

Unit

dVISO/dt

Common mode transient immunity

VCM = 1500 V

V/ns

VDD

Integrated 3.3 V voltage regulator

input voltage vs. GND

-0.30

6.50

VREG

Integrated 3.3 V voltage regulator

output voltage vs. GND

-0.30

3.60

VREG_ISO

Isolated logic supply voltage vs.

GNDISO

-0.30

3.60

VLOGIC

Logic pins voltage vs. GND

-0.30

VDD + 0.30

VHL

Differential supply voltage

(VH vs. VL)

-0.30

Positive supply voltage

(VH vs. GNDISO)

-0.30

Negative supply voltage

(VL vs. GNDISO)

-15

0.30

VOUT

Voltage on gate driver outputs

(GON, GOFF, CLAMP vs. VL)

VL - 0.30

VH + 0.30

VDESAT

Voltage on DESAT pin vs. GNDISO

-0.30

VH + 0.30

VSENSE

Voltage on SENSE pin vs. GNDISO

-2

(VH + 0.30, 20)min

VCECLAMP Voltage on VCECLAMP pin vs. VL

VL - 0.30

VH + 0.30

VASC

Voltage on ASC pin vs. GNDISO

-0.30

VH + 0.30

IDIAGx

Open drain DC output current

VDIAGx < 0.8 V

VDIAGx

Open drain output voltage

-0.30

6.50

Junction temperature

-40

150

°C

Storage temperature

-50

150

°C

Ambient temperature

-40

125

°C

PDin

Power dissipation input chip

fsw = 1 MHz

PDout

Power dissipation output chip

(TJ,max - TA)/Rth(JA) - PDin

dH/dt

Magnetic field immunity

100

A/(m·s)

ESD

Human body model

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