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STM32L100RB Scheda tecnica(PDF) 82 Page - STMicroelectronics |
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STM32L100RB Scheda tecnica(HTML) 82 Page - STMicroelectronics |
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82 / 103 page ![]() Electrical characteristics STM32L100C6 STM32L100R8/RB 82/103 DocID024295 Rev 5 6.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 53 are guaranteed by design. Table 52. ADC clock frequency Symbol Parameter Conditions Min Max Unit fADC ADC clock frequency Voltage Range 1 & 2 2.4 V ≤VDDA ≤3.6 V 0.480 16 MHz 1.8 V ≤VDDA ≤2.4 V 8 Voltage Range 3 4 Table 53. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit VDDA Power supply - 1.8 - 3.6 V IVDDA(1) Current on the VDDA input pin Peak - 1400 2150 µA Average - 1900 VAIN Conversion voltage range - 0(2) -VDDA V fS 12-bit sampling rate Direct channels - - 1 Msps Multiplexed channels - - 0.76 10-bit sampling rate Direct channels - - 1.07 Msps Multiplexed channels - - 0.8 8-bit sampling rate Direct channels - - 1.23 Msps Multiplexed channels - - 0.89 6-bit sampling rate Direct channels - - 1.45 Msps Multiplexed channels - - 1 tS Sampling time(3) Direct channels 2.4 V ≤VDDA ≤3.6 V 0.25 - - µs Multiplexed channels 2.4 V ≤VDDA ≤3.6 V 0.56 - - Direct channels 1.8 V ≤VDDA ≤2.4 V 0.56 - - Multiplexed channels 1.8 V ≤VDDA ≤2.4 V 1- - - 4 - 384 1/fADC tCONV Total conversion time (including sampling time) fADC = 16 MHz 1 - 24.75 µs - 4 to 384 (sampling phase) +12 (successive approximation) 1/fADC CADC Internal sample and hold capacitor Direct channels - 16 - pF Multiplexed channels - - |
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