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STM32L100RB Scheda tecnica(PDF) 87 Page - STMicroelectronics |
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STM32L100RB Scheda tecnica(HTML) 87 Page - STMicroelectronics |
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87 / 103 page ![]() DocID024295 Rev 5 87/103 STM32L100C6 STM32L100R8/RB Electrical characteristics 90 dGain/dT(1) Gain error temperature coefficient VDDA = 3.3V, TA = 0 to 50 ° C DAC output buffer OFF -10 -2 0 µV/°C VDDA = 3.3V, TA = 0 to 50 ° C DAC output buffer ON -40 -8 0 TUE(1) Total unadjusted error CL ≤ 50 pF, RL ≥ 5 kΩ DAC output buffer ON -12 30 LSB No RL, CL ≤ 50 pF DAC output buffer OFF -8 12 tSETTLING Settling time (full scale: for a 12-bit code transition between the lowest and the highest input codes till DAC_OUT reaches final value ±1LSB CL ≤ 50 pF, RL ≥ 5 kΩ -7 12 µs Update rate Max frequency for a correct DAC_OUT change (95% of final value) with 1 LSB variation in the input code CL ≤ 50 pF, RL ≥ 5 kΩ - - 1 Msps tWAKEUP Wakeup time from off state (setting the ENx bit in the DAC Control register)(7) CL ≤ 50 pF, RL ≥ 5 kΩ -9 15 µs PSRR+ VDDA supply rejection ratio (static DC measurement) CL ≤ 50 pF, RL ≥ 5 kΩ - -60 -35 dB 1. Guaranteed by characterization results. 2. Difference between two consecutive codes - 1 LSB. 3. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095. 4. Difference between the value measured at Code (0x800) and the ideal value = VDDA/2. 5. Difference between the value measured at Code (0x001) and the ideal value. 6. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 0xFFF when buffer is OFF, and from code giving 0.2 V and (VDDA – 0.2) V when buffer is ON. 7. In buffered mode, the output can overshoot above the final value for low input code (starting from min value). Table 56. DAC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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