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STM32L100RB Scheda tecnica(PDF) 84 Page - STMicroelectronics |
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STM32L100RB Scheda tecnica(HTML) 84 Page - STMicroelectronics |
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84 / 103 page ![]() Electrical characteristics STM32L100C6 STM32L100R8/RB 84/103 DocID024295 Rev 5 Figure 22. ADC accuracy characteristics Figure 23. Typical connection diagram using the ADC 1. Refer to Table 55: Maximum source impedance RAIN max for the value of RAIN and Table 53: ADC characteristics for the value of CADC 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. ET Total unadjusted error 1.8 V ≤ VDDA ≤ 2.4 V fADC = 4 MHz, RAIN = 50 Ω TA = -40 to 85 ° C -2 3 LSB EO Offset error - 1 1.5 EG Gain error - 1.5 2.5 ED Differential linearity error - 1 2 EL Integral linearity error - 2 3 1. ADC DC accuracy values are measured after internal calibration. 2. ADC accuracy vs. negative injection current: Injecting a negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents. Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 6.3.12 does not affect the ADC accuracy. 3. Guaranteed by characterization results. Table 54. ADC accuracy(1)(2) (continued) Symbol Parameter Test conditions Min(3) Typ Max(3) Unit |
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