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SAFC161RI Scheda tecnica(PDF) 20 Page - Siemens Semiconductor Group |
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SAFC161RI Scheda tecnica(HTML) 20 Page - Siemens Semiconductor Group |
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20 / 60 page ![]() Semiconductor Group 20 1998-05-01 C161RI (CAPIN), and timer T5 may optionally be cleared after the capture procedure. This allows absolute time differences to be measured or pulse multiplication to be performed without software overhead. The capture trigger (timer T5 to CAPREL) may also be generated upon transitions of GPT1 timer T3’s inputs T3IN and/or T3EUD. This is especially advantageous when T3 operates in Incremental Interface Mode. Figure 6 Block Diagram of GPT1 MCB02141 GPT1 Timer T2 Mode Control Interrupt Request T2IN T2 2 n n = 3...10 CPU Clock Reload Capture T2EUD T3 Mode Control CPU Clock n = 3...10 n 2 T3IN GPT1 Timer T3 T3OTL Request Interrupt T4 Control Mode Reload Capture CPU Clock n = 3...10 n 2 T4IN Request Interrupt GPT1 Timer T4 T4EUD T3EUD Toggle FF U/D U/D U/D |
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