AD9144BCPZ datasheet(5/125 Pages) AD

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Data Sheet

AD9144

Rev. B | Page 5 of 125

SPECIFICATIONS

DC SPECIFICATIONS

AVDD33 = 3.3 V, SIOVDD33 = 3.3 V, IOVDD = 1.8 V, DVDD12 = 1.2 V, CVDD12 = 1.2 V, PVDD12 = 1.2 V, SVDD12 = 1.2 V, VTT = 1.2 V,

TA = −40°C to +85°C, IOUTFS = 20 mA, unless otherwise noted.

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

RESOLUTION

Bits

ACCURACY

With calibration

Differential Nonlinearity (DNL)

±1.0

LSB

Integral Nonlinearity (INL)

±2.0

LSB

MAIN DAC OUTPUTS

Gain Error

With internal reference

−2.5

+5.5

% FSR

I/Q Gain Mismatch

−0.6

+0.6

% FSR

Full-Scale Output Current

Based on a 4 kΩ external resistor between I120 and GND

Maximum Setting

25.5

27.0

28.6

Minimum Setting

13.1

13.9

14.8

Output Compliance Range

−250

+750

Output Resistance

0.2

MΩ

Output Capacitance

3.0

Gain DAC Monotonicity

Guaranteed

Settling Time

To within ±0.5 LSB

MAIN DAC TEMPERATURE DRIFT

Offset

0.04

ppm

Gain

ppm/°C

REFERENCE

Internal Reference Voltage

1.2

ANALOG SUPPLY VOLTAGES

AVDD33

3.13

3.3

3.47

PVDD12

1.14

1.2

1.26

CVDD12

1.14

1.2

1.26

DIGITAL SUPPLY VOLTAGES

SIOVDD33

3.13

3.3

3.47

VTT

1.1

1.2

1.37

DVDD12

1.14

1.2

1.26

1.274

1.3

1.326

SVDD12

1.14

1.2

1.26

1.274

1.3

1.326

IOVDD

1.71

1.8

3.47

POWER CONSUMPTION

4× Interpolation Mode,

JESD Mode 4, 8 SERDES Lanes

fDAC = 1.6 GSPS, IF = 40 MHz, NCO off, PLL on, digital gain

on, inverse sinc on, DAC FSC = 20 mA

1.59

1.84

AVDD33

126

134

PVDD12

95.3

112.4

CVDD12

101

111

SVDD12

Includes VTT

518.2

654

DVDD12

234

255

SIOVDD33

IOVDD

µA

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