PIFE32251B-R47MS datasheet(48/96 Pages) TI1

Il numero della parte	PIFE32251B-R47MS

Spiegazioni elettronici	PMIC for Intel Apollo Lake Platform

PDF	96 Pages

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Produttore elettronici	TI1 [Texas Instruments]

Homepage	http://www.ti.com

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48 / 96 page

LDOAx

SWx

RSMRSTB

PCH_PWROK

444 ns (nominal with ±1% variation)

VSYS

BUCKx

VTT

5.4 V

TPS65094

SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019

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Detailed Description

6.3.5.6

Emergency Shutdown

When VSYS crosses below VSYS_UVLO_5V, all Power Good pins are deasserted; after 444 ns (nominal) of

delay, all VRs shut down (see Figure 6-12). Upon shutdown, all internal discharge resistors are set to 100

Ω to ensure timely decay of all VR outputs. VSYS crossing above VSYS_UVLO_5V + VSYS_UVLO_5V_HYS and

assertion of PMICEN is required to re-enable the VRs.

Other conditions that cause emergency shutdown are the following:

•

The die temperature rising above the critical temperature threshold (TCRIT)

•

Falling edge of THERMTRIPB

•

Deassertion of Power Good of any rail or failure to reach power good within 10 ms of enable

(configurable)

Figure 6-12. Emergency Shutdown Sequence

PIFE32251B-R47MS Scheda tecnica(PDF) 48 Page - Texas Instruments