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SM320VC33 Scheda tecnica(PDF) 32 Page - Texas Instruments

Il numero della parte SM320VC33
Spiegazioni elettronici  DIGITAL SIGNAL PROCESSOR
PDF  54 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

SM320VC33 Scheda tecnica(HTML) 32 Page - Texas Instruments

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SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
32
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251-1443
XF0 and XF1 timing when executing LDFI or LDII
The following tables define the timing parameters for XF0 and XF1 during execution of LDFI or LDII.
timing requirements for XF0 and XF1 when executing LDFI or LDII (see Figure 21)
MIN
MAX
UNIT
tsu(XF1-H1L)
Setup time, XF1 before H1 low
4*
ns
th(H1L-XF1)
Hold time, XF1 after H1 low
0*
ns
* Not production tested
switching characteristics over recommended operating conditions for XF0 and XF1 when executing
LDFI or LDII (see Figure 21)
PARAMETER
MIN
MAX
UNIT
td(H3H-XF0L)
Delay time, H3 high to XF0 low
3
ns
H3
H1
R/W
A[23:0]
D[31:0]
RDY
XF0
XF1
Fetch
LDFI or LDII
Decode
Read
Execute
PAGEx, STRB
td(H3H-XF0L)
tsu(XF1-H1L)
th(H1L-XF1)
Figure 21. Timing for XF0 and XF1 When Executing LDFI or LDII



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