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SM320VC33 Scheda tecnica(PDF) 35 Page - Texas Instruments |
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SM320VC33 Scheda tecnica(HTML) 35 Page - Texas Instruments |
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35 / 54 page ![]() SM320VC33, SMJ320VC33 DIGITAL SIGNAL PROCESSOR SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002 35 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251-1443 loading when XF is configured as an output The following table defines the timing parameter for loading the XF register when the XFx pin is configured as an output. switching characteristics over recommended operating conditions for loading the XF register when configured as an output pin (see Figure 24) PARAMETER MIN MAX UNIT tv(H3H-XF) Valid time, XFx after H3 high 3 ns Fetch Load Decode Read Execute H3 H1 OUTXFx Bit (see Note A) XFx 1 or 0 Instruction tv(H3H-XF) NOTE A: OUTXFx represents either bit 2 or 6 of the IOF register. Figure 24. Timing for Loading XF Register When Configured as an Output Pin |
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