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R5F572TFGDFP Scheda tecnica(PDF) 53 Page - Renesas Technology Corp

Il numero della parte R5F572TFGDFP
Spiegazioni elettronici  Maximum operating frequency: 200 MHz Capable of 1160 CoreMark in operation at 200 MHz
PDF  176 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F572TFGDFP Scheda tecnica(HTML) 53 Page - Renesas Technology Corp

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R01DS0331EJ0100 Rev.1.00
Page 53 of 176
Feb 08, 2019
RX72T Group
3. Address Space
3.2
External Address Space
The external address space is divided into four CS areas (CS0 to CS3), each corresponding to the CSn# signal output
from a CSn# (n = 0 to 3) pin.
Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS3) in on-chip ROM disabled
extended mode.
Figure 3.2
Correspondence between External Address Spaces and CS Areas
(In On-Chip ROM Disabled Extended Mode)
Reserved area*1
Reserved area*1
Reserved area*1
Reserved area*1
0500 0000h
06E0 0000h
07E0 0000h
06DF FFFFh
07DF FFFFh
07FF FFFFh
CS3 (2 Mbytes)
FFFF FFFFh
FF00 0000h
CS0 (2 Mbytes)
05DF FFFFh
05E0 0000h
0600 0000h
05FF FFFFh
CS2 (2 Mbytes)
CS1 (2 Mbytes)
0700 0000h
06FF FFFFh
FFE0 0000h
FFDF 0000h
Reserved area*1
External address space
(CS area)
Reserved area*1
External address space
(CS area)*2
0000 0000h
0008 0000h
FFFF FFFFh
On-chip ROM disabled
extended mode
0010 0000h
0100 0000h
0800 0000h
FF00 0000h
00FF C000h
ECCRAM
000A 4000h
000A 6000h
Reserved area*1
0002 0000h
0500 0000h
On-chip RAM
Peripheral I/O register
Peripheral I/O register
Reserved area*1
Reserved area*1
Note 1. Reserved areas should not be accessed.
Note 2. The CS0 area is disabled in on-chip ROM enabled extended mode. In this mode, the memory map for the
addresses above 0800 0000h is as shown in Figure 3.1.



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