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R5F572TFGDFP Scheda tecnica(PDF) 87 Page - Renesas Technology Corp

Il numero della parte R5F572TFGDFP
Spiegazioni elettronici  Maximum operating frequency: 200 MHz Capable of 1160 CoreMark in operation at 200 MHz
PDF  176 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F572TFGDFP Scheda tecnica(HTML) 87 Page - Renesas Technology Corp

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R01DS0331EJ0100 Rev.1.00
Page 87 of 176
Feb 08, 2019
RX72T Group
4. I/O Registers
0009 E469h
POE
MTU9 Pin Select Register 2
M9SELR2
8
8
2, 3 PCLKB
2 ICLKPOE3B
0009 E46Ah
POE
GPTW0 Pin Select Register
G0SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E46Bh
POE
GPTW1 Pin Select Register
G1SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E46Ch
POE
GPTW2 Pin Select Register
G2SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E46Dh
POE
GPTW3 Pin Select Register
G3SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E46Eh
POE
GPTW4 Pin Select Register
G4SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E46Fh
POE
GPTW5 Pin Select Register
G5SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E470h
POE
GPTW6 Pin Select Register
G6SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E471h
POE
GPTW7 Pin Select Register
G7SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E472h
POE
GPTW8 Pin Select Register
G8SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
0009 E473h
POE
GPTW9 Pin Select Register
G9SELR
8
8
2, 3 PCLKB
2 ICLK
POE3B
000A 0000h
USB0
System Configuration Control Register
SYSCFG
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 0004h
USB0
System Configuration Status Register 0
SYSSTS0
16
16
9 PCLKB
or more
Rounded up to
the nearest
integer greater
than 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 0008h
USB0
Device State Control Register 0
DVSTCTR0
16
16
9 PCLKB
or more
Rounded up to
the nearest
integer greater
than 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 0014h
USB0
CFIFO Port Register
CFIFO
16
8, 16
3, 4 PCLKB
2 ICLK
USBb
000A 0018h
USB0
D0FIFO Port Register
D0FIFO
16
8, 16
3, 4 PCLKB
2 ICLK
USBb
000A 001Ch
USB0
D1FIFO Port Register
D1FIFO
16
8, 16
3, 4 PCLKB
2 ICLK
USBb
000A 0020h
USB0
CFIFO Port Select Register
CFIFOSEL
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 0022h
USB0
CFIFO Port Control Register
CFIFOCTR
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 0028h
USB0
D0FIFO Port Select Register
D0FIFOSEL
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 002Ah
USB0
D0FIFO Port Control Register
D0FIFOCTR
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 002Ch
USB0
D1FIFO Port Select Register
D1FIFOSEL
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 002Eh
USB0
D1FIFO Port Control Register
D1FIFOCTR
16
16
3, 4 PCLKB
2 ICLK
USBb
000A 0030h
USB0
Interrupt Enable Register 0
INTENB0
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 0032h
USB0
Interrupt Enable Register 1
INTENB1
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 0036h
USB0
BRDY Interrupt Enable Register
BRDYENB
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 0038h
USB0
NRDY Interrupt Enable Register
NRDYENB
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 003Ah
USB0
BEMP Interrupt Enable Register
BEMPENB
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
000A 003Ch
USB0
SOF Output Configuration Register
SOFCFG
16
16
9 PCLKB
or more
Frequency
with 1 + 9 ×
(frequency
ratio of ICLK/
PCLKB)*1
USBb
Table 4.1
List of I/O Registers (Address Order) (32 / 54)
Address
Module
Symbol Register Name
Register
Symbol
Number
of Bits
Access
Size
Number of Access Cycles
Related
Function
ICLK ≥ PCLK ICLK < PCLK



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