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VR4102 Scheda tecnica(PDF) 203 Page - NEC

Il numero della parte VR4102
Spiegazioni elettronici  64/32-bit Microprocessor
PDF  701 Pages
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Produttore elettronici  NEC [NEC]
Homepage  http://www.nec.com/
Logo NEC - NEC

VR4102 Scheda tecnica(HTML) 203 Page - NEC

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CHAPTER 7 INITIALIZATION INTERFACE
203
7.1.4 Software Shutdown
When the software executes the HIBERNATE instruction, the VR4102 sets the DRAM to self refresh mode and
sets the MPOWER pin as inactive, then enters reset status. Recovery from reset status occurs when the POWER
pin is asserted, when a WakeUpTimer interrupt occurs, or when the DCD# pin is asserted.
A reset by software shutdown initializes the entire internal state except for the RTC timer and the PMU.
After a reset, the processor becomes the system bus master and it begins the Cold reset exception sequence to
access the reset vectors in the ROM space. Since only part of the internal status is reset when a reset occurs in the
VR4102, the processor should be completely initialized by software.
Figure 7-4. Software Shutdown
Reset#(internal)
ColdReset#(internal)
MPOWER(o)
POWER(i)
MRAS(0:3)#/
UCAS#/LCAS#
(o)
RTC
(internal, 32kHz)
Stable oscillation
16MasterClock
Note
16ms
350ms
Undefined
PLL(internal)
>32ms
POWERON(o)
Stopped
Stable oscillation
Note MasterClock is the basic clock used in the CPU core.



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