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VR4102 Scheda tecnica(PDF) 151 Page - NEC |
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VR4102 Scheda tecnica(HTML) 151 Page - NEC |
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151 / 701 page ![]() CHAPTER 5 MEMORY MANAGEMENT SYSTEM 151 Caution The value that can be set is different from that of the VR4100. Be sure to set the EP field and the AD bit to 0. If they are set with any other values, the processor may behave unexpectedly. 5.5.7 Load Linked Address (LLAddr) Register (17) The read/write Load Linked Address (LLAddr) register is a read/write register, and not used with the V R4102 processor except for diagnostic purpose, and serves no function during normal operation. LLAddr register is implemented just for compatibility between the VR4102 and VR4000/VR4400. Figure 5-18. LLAddr Register 0 31 PAddr 32 PAddr: 32-bit physical address |
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