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VR4102 Scheda tecnica(PDF) 154 Page - NEC |
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VR4102 Scheda tecnica(HTML) 154 Page - NEC |
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154 / 701 page ![]() CHAPTER 5 MEMORY MANAGEMENT SYSTEM 154 Figure 5-20. TLB Address Translation Virtual address (input) VPN and ASID Exception Exception Exception Exception Exception Exception Physical address (output) Address error No Yes Yes Yes No Yes Yes No Legal address? Supervisor mode? User mode? Legal address? Address error Legal address? Address error No No Yes Yes Yes Mapped address? No VPN match? Dirty Valid Global No G = 1? No V = 1? Yes Yes No D = 1? No Yes Uncached area? No ASID match? No 32-bit address? Yes Yes TLB Mismatch XTLB Mismatch TLB Invalid No No Yes Write? TLB Modified Access main memory Access cache memory Exception |
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