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PIMXRT406LCAE4A Scheda tecnica(PDF) 20 Page - NXP Semiconductors |
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PIMXRT406LCAE4A Scheda tecnica(HTML) 20 Page - NXP Semiconductors |
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20 / 71 page ![]() i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 03/2021 20 NXP Semiconductors Electrical characteristics NOTE The currents on the VDD_HIGH_CAP and VDD_USB_CAP were identified to be the voltage divider circuits in the USB-specific level shifters. 4.2 System power and clocks This section provide the information about the system power and clocks. 4.2.1 Power supplies requirements and restrictions The system design must comply with power-up sequence, power-down sequence, and steady state guidelines as described in this section to guarantee the reliable operation of the device. Any deviation from these sequences may result in the following situations: • Excessive current during power-up phase • Prevention of the device from booting • Irreversible damage to the processor (worst-case scenario) 4.2.1.1 Power-up sequence The below restrictions must be followed: • VDD_SNVS_IN supply must be turned on before any other power supply or be connected (shorted) with VDD_HIGH_IN supply. • If a coin cell is used to power VDD_SNVS_IN, then ensure that it is connected before any other supply is switched on. • When internal DCDC is enabled, external delay circuit is required to delay the “DCDC_PSWITCH” signal 1 ms after DCDC_IN is stable. • Need to ensure DCDC_IN ramps to 3.0 V within 0.2 x RC, RC is from external delay circuit used for DCDC_PSWITCH and RC must be longer than 1 ms. • POR_B should be held low during the entire power up sequence. NOTE The POR_B input (if used) must be immediately asserted at power-up and remain asserted until after the last power rail reaches its working voltage. In the absence of an external reset feeding the POR_B input, the internal POR module takes control. See the i.MX RT1015 Reference Manual (IMXRT1015RM) for further details and to ensure that all necessary requirements are being met. NOTE Need to ensure that there is no back voltage (leakage) from any supply on the board towards the 3.3 V supply (for example, from the external components that use both the 1.8 V and 3.3 V supplies). |
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