PIMXRT406LCAE4A datasheet(54/71 Pages) NXP

54 / 71 page

i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 03/2021

NXP Semiconductors

Electrical characteristics

Figure 34. LPSPI Slave mode timing (CPHA = 1)

4.8.2

LPI2C module timing parameters

This section describes the timing parameters of the LPI2C module.

4.8.2.1

Bus operation condition for 3.3 V and 1.8 V signaling

Signaling level of SD/eMMC4.3 and eMMC4.4/4.41 modes is 3.3 V. Signaling level of SDR104/SDR50

mode is 1.8 V. The DC parameters for the NVCC_SD1 supply are identical to those shown in Table 20,

"Single voltage GPIO DC parameters," on page 26.

4.8.3

LPUART electrical specifications

Please refer to Section 4.3.2.1, General purpose I/O AC parameters.

Table 47. LPI2C module timing parameters

Symbol

Description

Min

Max

Unit

Notes

fSCL

SCL clock frequency

Standard mode (Sm)

100

kHz

1, 2

1 Hs-mode is only supported in slave mode.

2 See General switching specifications.

Fast mode (Fm)

400

Fast mode Plus (Fm+)

1000

Ultra Fast mode (UFm)

5000

High speed mode (Hs-mode)

3400

MSB IN

BIT 6 . . . 1

MSB OUT

SLAVE LSB OUT

SLAVE

see

note

(INPUT)

(CPOL=0)

SCK

(CPOL=1)

PCS

(INPUT)

SOUT

(INPUT)

SIN

(OUTPUT)

LSB IN

BIT 6 . . . 1

NOTE: Not defined

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