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ADL6316ACCZ-R7 Scheda tecnica(PDF) 2 Page - Analog Devices |
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ADL6316ACCZ-R7 Scheda tecnica(HTML) 2 Page - Analog Devices |
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2 / 37 page ![]() ADL6316 Data Sheet Rev. 0 | Page 2 of 37 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Digital Logic Timing.................................................................... 4 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 14 RF Input Balun with DAC Interface Network........................ 14 Quadrature Hybrid..................................................................... 14 RF Signal Chain .......................................................................... 14 Basic Connections .......................................................................... 15 Programmability Guide................................................................. 16 Signal Path Modes...................................................................... 16 Auxiliary Mux Control .............................................................. 16 Serial Port Interface (SPI) ......................................................... 18 Device Setup.................................................................................... 19 Applications Information .............................................................. 21 Linearity Optimization.............................................................. 21 Performance and Power Optimization.................................... 21 Adjacent and Alternate Channel Power Ratios on LTE Operation .................................................................................... 21 Layout .......................................................................................... 22 Characterization Setups................................................................. 23 Register Summary .......................................................................... 24 Register Details ............................................................................... 25 Outline Dimensions....................................................................... 37 Ordering Guide .......................................................................... 37 REVISION HISTORY 10/2019—Revision 0: Initial Version |
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