ST25DV64KC datasheet(201/203 Pages) STMICROELECTRONICS

201 / 203 page

List of figures

Figure 1.

ST25DVxxKC block diagram .......................................................... 3

Figure 2.

ST25DVxxKC 8-pin SO8N package connections............................................. 4

Figure 3.

ST25DVxxKC 8-pin TSSOP8 package connections ........................................... 4

Figure 4.

ST25DVxxKC 8-pin UFDFN8 package connections .......................................... 5

Figure 5.

10-ball WLCSP package connections .................................................... 5

Figure 6.

ST25DVxxKC 12-pin UFDFPN12 package connections ........................................ 6

Figure 7.

ST25DVxxKC power-up sequence (No RF field, LPD pin tied to VSS or package without LPD pin)........... 9

Figure 8.

ST25DVxxKC RF power-up sequence (No DC supply) ....................................... 10

Figure 9.

Memory organization ............................................................... 12

Figure 10.

ST25DVxxKC user memory areas...................................................... 14

Figure 11.

RF to I2C fast transfer mode operation................................................... 25

Figure 12.

I2C to RF fast transfer mode operation................................................... 25

Figure 13.

Fast transfer mode mailbox access management. ........................................... 27

Figure 14.

ST25DVxxKC, Arbitration between RF and I2C ............................................. 31

Figure 15.

I2C “RFSwitchOff” command ......................................................... 32

Figure 16.

I2C “RFSwitchOn” command ......................................................... 32

Figure 17.

RF_USER chronogram ............................................................. 34

Figure 18.

RF_ACTIVITY chronogram .......................................................... 35

Figure 19.

RF_INTERRUPT chronogram......................................................... 36

Figure 20.

FIELD_CHANGE chronogram ........................................................ 37

Figure 21.

RF_PUT_MSG chronogram .......................................................... 38

Figure 22.

RF_GET_MSG chronogram .......................................................... 39

Figure 23.

RF_WRITE chronogram ............................................................ 40

Figure 24.

GPO/I2C_WRITE chronogram ........................................................ 41

Figure 25.

GPO/I2C_RF_OFF chronogram ....................................................... 42

Figure 26.

EH delivery state diagram ........................................................... 50

Figure 27.

ST25DVxxKC Energy Harvesting Delivery Sequence ........................................ 51

Figure 28.

RF security sessions management ..................................................... 60

Figure 29.

I2C security sessions management ..................................................... 61

Figure 30.

I²C bus protocol .................................................................. 67

Figure 31.

I²C timeout on Start condition ......................................................... 68

Figure 32.

Write mode sequences when write is not inhibited ........................................... 72

Figure 33.

Write mode sequences when write is inhibited ............................................. 72

Figure 34.

Write cycle polling flowchart using ACK .................................................. 73

Figure 35.

Read mode sequences ............................................................. 74

Figure 36.

I2C Present Password Sequence ...................................................... 76

Figure 37.

I2C Write Password Sequence ........................................................ 76

Figure 38.

ST25DVxxKC protocol timing ......................................................... 78

Figure 39.

ST25DVxxKC state transition diagram ................................................... 79

Figure 40.

Stay Quiet frame exchange between VCD and ST25DVxxKC ................................... 88

Figure 41.

Read Single Block frame exchange between VCD and ST25DVxxKC ............................. 89

Figure 42.

Extended Read Single Block frame exchange between VCD and ST25DVxxKC ...................... 90

Figure 43.

Write Single Block frame exchange between VCD and ST25DVxxKC ............................. 91

Figure 44.

Extended Write Single frame exchange between VCD and ST25DVxxKC .......................... 93

Figure 45.

Lock Block frame exchange between VCD and ST25DVxxKC .................................. 94

Figure 46.

Extended Lock block frame exchange between VCD and ST25DVxxKC ........................... 95

Figure 47.

Read Multiple Block frame exchange between VCD and ST25DVxxKC ............................ 96

Figure 48.

Extended Read Multiple Block frame exchange between VCD and ST25DVxxKC ..................... 98

Figure 49.

Write Multiple Block frame exchange between VCD and ST25DVxxKC ............................ 99

Figure 50.

Extended Write Multiple Block frame exchange between VCD and .............................. 101

Figure 51.

Select frame exchange between VCD and ST25DVxxKC ..................................... 102

ST25DV04KC ST25DV16KC ST25DV64KC

List of figures

DS13519 - Rev 3

page 201/203

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