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ADC12QJ1600ALREP Scheda tecnica(PDF) 13 Page - Texas Instruments

Il numero della parte ADC12QJ1600ALREP
Spiegazioni elettronici  ADC12QJ1600-EP Quad Channel 1.6-GSPS, 12-Bit, Analog-to-Digital Converter (ADC) with JESD204C Interface
PDF  148 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

ADC12QJ1600ALREP Scheda tecnica(HTML) 13 Page - Texas Instruments

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7.5 Electrical Characteristics: Power Consumption (continued)
Typical values at TJ = 50°C, VA19 = 1.9 V, VPLL19 = 1.9 V, VREFO = 1.9 V, VTRIG = 1.1V, VA11 = 1.1 V, VD11 = 1.1
V, default full-scale voltage (VFS = 0.8 VPP), fIN = 97 MHz, AIN = –1 dBFS, fCLK = 1.6 GHz, filtered 1-VPP sine-wave clock
applied to CLK±, PLL disabled, JMODE = 0, High Performance Mode and foreground calibration (unless otherwise noted);
minimum and maximum values are at nominal supply voltages and over the operating junction temperature range provided in
the Recommended Operating Conditions table
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IVA19
1.9-V analog supply current
Power mode 6: Power-down enabled (PD
= 1)
47
mA
IVPLL19
PLL analog supply current
0
mA
IVREFO
PLLREFO± analog supply current
0
mA
IVTRIG
TRIGOUT± analog supply current
0
mA
IVA11
1.1-V analog supply current
30
mA
IVD11
1.1-V digital supply current
17
mA
PDIS
Power dissipation
0.14
W
(1)
Low-power background (LPBG) calibration supply current and power dissipation numbers are in the calibration sleep state. The power
dissipation in this mode increases to the background (BG) calibration power consumption during the calibration state. The sleep period
can be controlled by the user and long sleep periods will average out the calibration state power dissipation contribution.
www.ti.com
ADC12QJ1600-EP
SBASAJ4A – JUNE 2022 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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