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ISL81601 Scheda tecnica(PDF) 30 Page - Renesas Technology Corp |
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ISL81601 Scheda tecnica(HTML) 30 Page - Renesas Technology Corp |
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30 / 54 page ![]() FN9299 Rev.3.1 Page 30 of 53 May 27, 2021 ISL81601 5. Functional Description Figure 44. VIN Feedback Loop FB_IN is a dual-function pin. It also sets the phase angle of the clock output signal on the CLKOUT/DITHER pin, shown in Table 2 on page 38. The VIN feedback loop is disabled when the FB_IN pin voltage is below 0.3V or above 4.7V. The VIN feedback loop is also disabled in DE mode and during soft-start. 5.5.3 Input and Output Average Current Monitoring and Regulation Loops As shown in Figure 45 on page 31, the ISL81601 has two current sense operational amplifiers (op amps), A1 and A2, which monitor both input and output current. The voltage signals on the input and output current sense resistor RS_IN and RS_OUT are sent to the differential inputs of CS+/CS- and ISEN+/ISEN-, respectively, after the RC filters RS_IN1/CS_IN1, RS_IN2/CS_IN2, RS_OUT1/CS_OUT1, and RS_OUT2/CS_OUT2. Renesas recommends using a 1Ω value for RS_IN1, RS_IN2, RS_OUT1, and RS_OUT2, and a 10nF value for CS_IN1, CS_IN2, CS_OUT1, and CS_OUT2 to effectively damp the switching noise without delaying the current signal too much and introducing too much error by the op amp bias current. The Gm op amps A1 and A2 then transfer the current sense voltage signals to current signals ICS and IISEN. where •IIN is the input current in Q1 drain •VCSOFFSET is the A1 input offset voltage •GmCS is the gain of A1, typical 200µS •VCSOFFSET GmCS = ICSOFFSET. The typical value of ICSOFFSET is 19.5µA. where •IOUT is the output current in Q4 drain •VISENOFFSET is the A2 input offset voltage •GmISEN is the gain of A2, typical 200µS •VISENOFFSET GmISEN = IISENOFFSET. The typical value of IISENOFFSET is 20µA. COMP FB_IN + _ + _ 0.8V REF GM2 VIN RFBIN1 RFBIN2 ICS IIN R S_IN VCSOFFSET + Gm CS = (EQ. 7) IISEN IOUT R S_OUT VISENOFFSET + Gm ISEN = (EQ. 8) |
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