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ISL81601 Scheda tecnica(PDF) 26 Page - Renesas Technology Corp |
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ISL81601 Scheda tecnica(HTML) 26 Page - Renesas Technology Corp |
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26 / 54 page ![]() FN9299 Rev.3.1 Page 26 of 53 May 27, 2021 ISL81601 5. Functional Description 5. Functional Description 5.1 General Description The ISL81601 implements a complete buck-boost switching control with a PWM controller, internal drivers, references, protection circuitry, current and voltage control inputs, and monitor outputs. Refer to Figure 6 on page 7. The ISL81601 is a current-mode controller. It uses a proprietary control algorithm to automatically switch between Buck and Boost modes as necessary to maintain a steady output voltage with changing input voltages and dynamic external loads. The controller integrates four control loops to regulate not only VOUT, but also average IOUT and IIN for constant current control and VIN for reverse direction control. The driver and protection circuits are also integrated to simplify the end design. The part has an independent enable/disable control line, which provides a flexible power-up sequencing and a simple VIN UVP implementation. The soft-start time is programmable by adjusting the soft-start capacitor connected from SS/TRK. 5.2 Internal 8V Linear Regulator (VDD), External Bias Supply (EXTBIAS), and 5V Linear Regulator (VCC5V) The ISL81601 provides two input pins, VIN and EXTBIAS, and two internal LDOs for VDD gate driver supply. A third LDO generates VCC5V from VDD. VCC5V provides power to all internal functional circuits other than the gate drivers. Bypass the linear regulator’s outputs (VDD) with a 10µF capacitor to the power ground. Also bypass the third linear regulator output (VCC5V) with a 10µF capacitor to the signal ground. VCC5V is monitored by a power-on-reset circuit, which disables all regulators when VCC5V falls below 3.5V. Both LDOs from VIN and EXTBIAS can source over 75mA for VDD to power the buck and boost gate drivers. When driving large FETs at high switching frequency, little or no regulator current may be available for external loads. The LDO from VDD to VCC5V can also source over 75mA to supply the IC internal circuit. Although the current consumed by the internal circuit is low, the current supplied by VCC5V to the external loads is limited by VDD. For example, a single large FET with 15nC total gate charge requires 15nC x 300kHz = 4.5mA (15nC x 600kHz = 9mA). Also, at higher input voltages with larger FETs, the power dissipation across the internal 8V LDO increases. Excessive power dissipation across this regulator must be avoided to prevent junction temperature rise. Thermal protection may be triggered if die temperature increases above +160°C due to excessive power dissipation. When large MOSFETs or high input voltages are used, an external 8V bias voltage can be applied to the EXTBIAS pin to alleviate excessive power dissipation. When the voltage at the EXTBIAS pin is higher than typical 7.38V, the LDO from EXTBIAS activates and the LDO from VIN is disconnected. The recommended maximum voltage at the EXTBIAS pin is 36V. For applications with VOUT significantly lower than VIN, EXTBIAS is usually back biased by VOUT to reduce the LDO power loss. EXTBIAS is allowed to activate only after soft-start is finished to avoid early activation during the VOUT rising stage. An external UVLO circuit might be necessary to ensure smooth soft-starting. Renesas recommends adding a 10µF capacitor on the EXTBIAS pin and using a diode to connect the EXTBIAS pin to VOUT to avoid the EXTBIAS pin voltage being pulled low at the VOUT short-circuit condition. The two VDD LDOs have an overcurrent limit for short-circuit protection. The VIN to VDD LDO current limit is set to typical 120mA. The EXTBIAS to VDD LDO current limit is set to typical 160mA. 5.3 Enable (EN/UVLO) and Soft-Start Operation Pulling the EN/UVLO pin high or low can enable or disable the controller. When the EN/UVLO pin voltage is higher than 1.3V, the three LDOs are enabled. After the VCC5V reaches the POR threshold, the controller is powered up to initialize its internal circuit. When EN/UVLO is higher than the 1.8V accurate UVLO threshold, the ISL81601 soft-start circuitry becomes active. The internal 2µA charge current begins charging up the soft-start |
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