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PowerPC 604 RISC Microprocessor Technical Summary

Each cache line contains eight contiguous words from memory that are loaded from an eight-word boundary

(that is, bits A27–A31 of the logical addresses are zero); thus, a cache line never crosses a page boundary.

Accesses that cross a page boundary can incur a performance penalty.

To ensure coherency among caches in a multiprocessor (or multiple caching-device) implementation, the

604 implements the MESI protocol on a per cache-block basis. MESI stands for modified/exclusive/shared/

invalid. These four states indicate the state of the cache block as follows:

•

Modified (M)—The cache block is modified with respect to system memory; that is, data for this

address is valid only in the cache and not in system memory.

•

Exclusive (E)—This cache block holds valid data that is identical to the data at this address in

system memory. No other cache has this data.

•

Shared (S)—This cache block holds valid data that is identical to this address in system memory

and at least one other caching device.

•

Invalid (I)—This cache block does not hold valid data.

Figure 3. Cache Unit Organization

1.2.5 System Interface/Bus Interface Unit (BIU)

The 604 provides a versatile bus interface that allows a wide variety of system design options. The interface

includes a 72-bit data bus (64-bits of data and 8-bits of parity), a 36-bit address bus (32-bits of address and

4-bits of parity), and sufficient control signals to allow for a variety of system-level optimizations. The 604

uses one-beat and four-beat data transactions, although it is possible for other bus participants to perform

longer data transfers. The 604 clocking structure supports processor-to-bus clock ratios of 1:1, 1.5:1, 2:1,

and 3:1, as described in Section 1.2.6, “Clocking.”

The system interface is specific for each PowerPC processor implementation. The 604 system interface is

shown in Figure 4.

Address Tag 1

Address Tag 2

Address Tag 3

Block 1

Block 2

Block 3

128 Sets

Address Tag 0

Block 0

8 Words/Block

State

State

State

State

Words 0–7

Words 0–7

Words 0–7

Words 0–7

Freescale Semiconductor, Inc.

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