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MB91301 Scheda tecnica(PDF) 4 Page - Fuji Electric |
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MB91301 Scheda tecnica(HTML) 4 Page - Fuji Electric |
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4 / 135 page ![]() MB91301 Series 4 (Continued) 13. Input capture • 4 channels 14. Other interval timers • 16-bit timer : 3 channels (U-TIMER) • PPG timer : 4 channels • Watchdog timer : 1 channel 15. Other features • Reset resources : watchdog timer/software reset/external reset (INIT pin) • Power-saving modes : Stop mode, sleep mode • Clock control Gear function : Allows arbitrary different operating clock frequencies to be set for the CPU and peripherals. You can select one of the 16 gear clock factors of 1/1 to 1/16. PLL multiplication can also be selected. Note, however, that peripherals operate at a maximum of 34 MHz. • CMOS technology : 0.25 µm • Power supply (analog power supply): 3.3 V ± 0.3 V (internal regulator used) * : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips. ■ PRODUCT LINEUP *1 : The Fujitsu product of real time OS REALOS/FR by conforming to the µITRON 3.0 is stored and optimized with the MB91302A. *2 : The ROM stores the IPL (Internal Program Loader) . Loading various programs can be executed from the external system by the internal UART/SIO. Using this function, for example, writing on board to the Flash memory connected to the external can be executed. MB91302A MB91V301A Type Mask ROM product (for volume production) Evaluation version (For evaluation and develop- ment) RAM 4 Kbytes (only for data) 16 Kbytes (data 8 KB +8 KB) ROM 4 Kbytes ROM has non-ROM model, the optimal real time OS internal model*1, and the IPL (Internal Program Loader) internal model*2 by adding the user ROM model. 8 Kbytes (RAM) DSU ⎯ DSU4 Package LQFP-144 (0.4 mm pitch) PGA-179 |
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