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MPC5553AVF80R2 Scheda tecnica(PDF) 33 Page - Freescale Semiconductor, Inc |
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MPC5553AVF80R2 Scheda tecnica(HTML) 33 Page - Freescale Semiconductor, Inc |
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33 / 60 page ![]() Electrical Characteristics MPC5553 Microcontroller Data Sheet, Rev. 0 Preliminary—Subject to Change Without Notice Freescale Semiconductor 33 Figure 11. CLKOUT Timing 7 Input Signal Valid to CLKOUT Posedge (Setup Time) ADDR[8:31] BB BG5 BR5 DATA[0:31] RD_WR TA TEA TS TSIZ[0:1] tCIS 10.0 —7.0 —5.0 — ns 8 CLKOUT Posedge to Input Signal Invalid (Hold Time) ADDR[8:31] BB BG5 BR5 DATA[0:31] RD_WR TA TEA TS TSIZ[0:1] tCIH 1.0 — 1.0 — 1.0 — ns 1 EBI timing specified at VDD = 1.35V to 1.65V, VDDE = 1.6V to 3.6V (unless stated otherwise), VDD33 and VDDSYN = 3.0V to 3.6V, TA = TL to TH, and CL = 30pF with DSC = 0b10. 2 The external bus is limited to half the speed of the internal bus. 3 Refer to Fast Pad timing in Table 17 and Table 18 (different values for 1.8V vs 3.3V). 4 Internal Arbitration 5 External Arbitration 6 The EBTS=0 timings are only valid/ tested at VDDE=2.25-3.6V, whereas EBTS=1 timings are valid/tested at 1.6–3.6V. Table 22. Bus Operation Timing1 (continued) # Characteristic/Description Symbol 40 MHz (ext. bus)2 56 MHz (ext. bus)2 66 MHz (ext. bus)2 Unit Notes Min Max Min Max Min Max 1 2 2 3 4 CLKOUT VDDE/2 Vol_f Voh_f |
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