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AT87C5103-ICSIL Scheda tecnica(PDF) 52 Page - ATMEL Corporation |
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AT87C5103-ICSIL Scheda tecnica(HTML) 52 Page - ATMEL Corporation |
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52 / 64 page ![]() 52 AT8xC5103 4134C–8051–09/04 Table 35. IPH0 Register IPH0 (S:B7h) IPH0 - Interrupt Priority High Register 0 Reset Value = X0XX 0000b Not bit addressable 76 543 210 - PPCH - - PT1H PX1H PT0H PX0H Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCH PCA Counter Interrupt Priority Level Most Significant bit PPCH PPCL Priority level 00 Lowest 01 10 1 1 Highest priority 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3PT1H Timer 1 overflow interrupt Priority High bit PT1H PT1L Priority Level 00 Lowest 01 10 1 1 Highest 2 PX1H External interrupt 1Priority High bit PX1H PX1L Priority Level 00 Lowest 01 10 1 1 Highest 1PT0H Timer 0 overflow interrupt Priority High bit PT0H PT0L Priority Level 00 Lowest 01 10 1 1 Highest 0 PX0H External interrupt 0 Priority High bit PX0H PX0L Priority Level 00 Lowest 01 10 1 1 Highest |
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