AT87C5103-ICSIL datasheet(57/64 Pages) ATMEL

57 / 64 page

AT8xC5103

4134C–8051–09/04

Notes: 1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 32.), VIL =

VSS + 0.5V,

VIH = VCC - 0.5V; XTAL2 N.C.; RST= VCC;. The internal ROM runs the code 80 FE (label: SJMP label). ICC would be slightly

higher if a crystal oscillator is used.

2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC -

0.5V; XTAL2 N.C; RST = VSS (see Figure 30.).

3. Power Down ICC is measured with all output pins disconnected; XTAL2 NC.; RST = VSS (see Figure 31.).

4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1

and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0

transitions during bus operation. In the worst cases (capacitive loading 100 pF), the noise pulse on the ALE line may exceed

0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.

5. Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and

5V.

6. If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater

than the listed test conditions.

Figure 28. ICC Test Condition, Under Reset

Figure 29. Operating ICC Test Condition

ICC

idle

Power Supply Current Maximum values, X1 mode:

0.6xF+0.8

1.0xF+1.5

VCC < 4.5V

(2)

VCC > 4.5V

(2)

VRET

Supply voltage during power-down mode

Table 38. DC Parameters (Continued)

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

VCC

ICC

(NC)

CLOCK

SIGNAL

All other pins are disconnected.

RST

XTAL2

XTAL1

VSS

VCC

ICC

(NC)

CLOCK

SIGNAL

All other pins are disconnected.

RST

XTAL2

XTAL1

VSS

VCC

Reset = VSS after a low pulse

during at least 24 clock cycles

VCC

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