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AT87C5103-ICSIL Scheda tecnica(PDF) 53 Page - ATMEL Corporation |
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AT87C5103-ICSIL Scheda tecnica(HTML) 53 Page - ATMEL Corporation |
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53 / 64 page ![]() 53 AT8xC5103 4134C–8051–09/04 Table 36. IPH1 Register IPH1 - Interrupt Priority High Register 1 (B3h) Reset Value = XXXX X0XXb Not bit addressable 76 543 210 -- --- PSPIH - - Bit Number Bit Mnemonic Description 7 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2 PSPIH SPI Interrupt Priority Level Most Significant bit PSPIH PSPIL Priority level 0 0 Lowest 01 10 1 1 Highest 1- Reserved The value read from this bit is indeterminate. Do not set this bit. 0- Reserved The value read from this bit is indeterminate. Do not set this bit. |
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