ADA4511-2ARMZ-R7 datasheet(22/28 Pages) AD

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Data Sheet

ADA4511-2

APPLICATIONS INFORMATION

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Rev. A | 22 of 28

MUX-COMPATIBLE DATA ACQUISITION

SYSTEM

Data acquisition in multichannel systems can be accomplished by

multiplexing as shown in Figure 76. This technique is very popular

in instrumentation, industrial process control, and automated test

equipment (ATE), because it reduces the number of components

needed to sense multiple sensors, which saves significant power,

size, and cost.

Figure 76. Multiplexed Data Acquisition System

One risk in designing this system is the possibility of exposing

the buffer amplifier to a large differential voltage due to the fast

switching from a large positive voltage to a large negative voltage

by the mux. If the buffer amplifier is not chosen properly, it may

experience a large inrush current that can degrade the performance

of the system or, worse, permanently damage the part.

The ADA4511-2 solves this problem using a robust mux-compatible

architecture that can tolerate large differential voltages up to the

supply rails without the use of differential back-to-back diodes.

This significantly reduces inrush current, improves settling and

distortion performance without experiencing any input loading effect

compared to classic op amps with back-to-back diodes, as shown

in Figure 77.

Figure 77. ADA4511-2 Inrush Current Reduction

Design Example

The circuit shown in Figure 78 is a classic multichannel data

acquisition signal chain consisting of a mux, amplifiers, and an

analog-to-digital converter (ADC). The architecture allows fast sam-

pling of multiple channels using a single ADC, which provides low

cost and excellent channel-to-channel matching. Channel-to-chan-

nel switching speed is limited by the settling time of the various

components following the mux in the signal chain, because the

mux can present a full-scale step VOUT to the downstream amplifier

and the ADC. The components in this circuit have been specifically

chosen to minimize settling time and maximize channel-to-channel

switching speed.

Figure 78. 16-bit, 8-Channel, Single-Ended to Differential, Multiplexed Data

Acquisition System

This circuit operates in continuous switching mode. The multiplexer

ADG5408 switches continuously with a switching rate that is in

sync with the ADC conversion cycle. The signal is buffered by

the ADA4511-2 and drives to the AD8475, which attenuates, level

shifts, and converts the signal from single-ended to a differential

output. An RC filter is used at the input of the ADC to minimize

out-of-band noise and attenuate the kickback from the switched

capacitor at the ADC input.

To calculate the settling time, the circuit can be divided into parts

shown in Figure 79.

Figure 79. Block Diagram for Settling Time Analysis

The entire settling time is then approximated as the root-sum-

square (RSS) of the settling time of each stage.

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