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KSZ8565R Scheda tecnica(PDF) 21 Page - Microchip Technology

Il numero della parte KSZ8565R
Spiegazioni elettronici  5-Port 10/100 Ethernet Switch with Audio Video Bridging and Single RGMII/MII/RMII Interface
PDF  235 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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KSZ8565R Scheda tecnica(HTML) 21 Page - Microchip Technology

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DS00002327F-page 21
KSZ8565R
After auto-negotiation is completed, the link status is updated in the PHY Basic Status Register, and the link partner
capabilities are updated in the PHY Auto-Negotiation Link Partner Ability Register and PHY Auto-Negotiation Expansion
Status Register.
4.1.6
QUIET-WIRE FILTERING
Quiet-WIRE is a feature to enhance 100BASE-TX EMC performance by reducing both conducted and radiated emis-
sions from the TXP/M signal pair. It can be used either to reduce absolute emissions, or to enable replacement of
shielded cable with unshielded cable, all while maintaining interoperability with standard 100BASE-TX devices.
Quiet-WIRE filtering is implemented internally, with no additional external components required. It is enabled or disabled
for all PHYs at power-up and reset by a strapping option on the LED1_0 pin.
The default setting for Quiet-WIRE reduces emissions primarily above 60MHz, with less reduction at lower frequencies.
Several dB of reduction is possible. Signal attenuation is approximately equivalent to increasing the cable length by 10
to 20 meters, thus reducing cable reach by that amount. For applications needing more modest improvement in emis-
sions, the level of filtering can be reduced by writing to certain registers.
Each PHY port has a set of MMD registers for configuring Quiet-WIRE. Table 4-2 provide the register settings for dis-
abling Quiet-WIRE, and for enabling it in the default setting as can be enabled by the strapping option.
4.1.7
FAST LINK-UP
Link up time is normally determined by the time it takes to complete auto-negotiation. Additional time may be added by
the auto MDI/MDI-X feature. The total link up time from power-up or cable connect is typically a second or more.
Fast Link-up mode significantly reduces 100BASE-TX link-up time by disabling both auto-negotiation and auto MDI/
MDI-X, and fixing the TX and RX channels. This mode is enabled or disabled by the LED2_1 strapping option. It is not
set by registers, so fast link-up is available immediately upon power-up. Fast Link-up is available at power-up only for
100BASE-TX link speed, which is selected by strapping the LED4_0 pin high. Fast Link-up is also available for 10BASE-
T/Te, but this link speed must first be selected via a register write.
Fast Link-up is intended for specialized applications where both link partners are known in advance. The link must also
be known so that the fixed transmit channel of one device connects to the fixed receive channel of the other device, and
vice versa. The TX and RX channel assignments are determined by the MDI/MDI-X strapping option on LED2_0.
TABLE 4-2:
ENABLING AND DISABLING QUIET-WIRE
MMD Register
Disable Quiet-WIRE
Enable Quiet-WIRE
default
MMD Quiet-WIRE Configuration 0 Register
0x0000
0x0001
MMD Quiet-WIRE Configuration 1 Register
0x1F0F
0x0E03
MMD Quiet-WIRE Configuration 2 Register
0x1F1F
0x3020
MMD Quiet-WIRE Configuration 3 Register
0x0010
0x2E36
MMD Quiet-WIRE Configuration 4 Register
0x0000
0x0B1C
MMD Quiet-WIRE Configuration 5 Register
0x0000
0x7E01
MMD Quiet-WIRE Configuration 6 Register
0x0000
0x7F7E
MMD Quiet-WIRE Configuration 7 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 8 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 9 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 10 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 11 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 12 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 13 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 14 Register
0x0000
0x0000
MMD Quiet-WIRE Configuration 15 Register
0x0000
0x0000



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