KSZ8565R datasheet(22/235 Pages) MICROCHIP

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KSZ8565R

DS00002327F-page 22

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If a device in Fast Link-up mode is connected to a normal device (auto-negotiate and auto-MDI/MDI-X), there will be no

problems linking, but the speed advantage of Fast Link-up will not be realized.

For more information on configuration straps, refer to Section 3.2.1, "Configuration Straps," on page 16.

4.1.8

LinkMD®+ ENHANCED DIAGNOSTICS: RECEIVE SIGNAL QUALITY INDICATOR

A receive Signal Quality Indicator (SQI) feature can be used to determine the relative quality of the 100BASE-TX receive

signal. It approximates a signal-to-noise ratio, and is affected by cable length, cable quality, and coupled of environmen-

tal noise.

The raw SQI values are available for reading at any time from the MMD Signal Quality Register which is located in the

MMD register space.

Use bits [14:8] from the register. A lower value indicates better signal quality, while a higher value indicates worse signal

quality. Even for a stable configuration in a low-noise environment, the value read from this register will vary, often sig-

nificantly. It is necessary to average many readings to come up with a reasonably useful result. The update interval of

the SQI register is 2µs, so measurements taken more frequently than 2µs will be redundant. In a quiet environment, It

is suggested to average a minimum of 10 to 20 readings. In a noisy environment, individual readings are even more

unreliable, so a minimum of 30 to 50 readings are suggested for averaging. The SQI circuit does not include any hys-

teresis.

The Linux driver provided by Microchip includes SQI support. It does the averaging and provides a single number to

represent the SQI.

4.1.9

REMOTE PHY LOOPBACK

This loopback mode checks the line (differential pairs, transformer, RJ-45 connector, Ethernet cable) transmit and

receive data paths between the KSZ8565R and its Ethernet PHY link partner, and is supported for 10/100 Mbps at full-

duplex.

The loopback data path is shown in Figure 4-2 and functions as follows:

• The Ethernet PHY link partner transmits data to the KSZ8565R PHY port.

• Data received at the external pins of the PHY port is looped back without passing through the MAC and internal

switch fabric.

• The same KSZ8565R PHY port transmits data back to the Ethernet PHY link partner.

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