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MB90F482 Scheda tecnica(PDF) 36 Page - fujitsu semiconductor |
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MB90F482 Scheda tecnica(HTML) 36 Page - fujitsu semiconductor |
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36 / 120 page ![]() MB90480/485 Series 36 2. UART The UART is a serial I/O port for asynchronous (start-stop synchronized) communication as well as CLK synchronized communication. • Full duplex double buffer • Transfer modes : asynchronous (start-stop synchronized) , or CLK synchronized (no start bit or stop bit) . • Multi-processor mode supported. • Embedded proprietary baud rate generator Asynchronous : 76923/38461/19230/9615/500 k/250 kbps CLK synchronized : 16 M/8 M/4 M/2 M/1 M/500 kbps • External clock setting available, allows use of any desired baud rate. • Can use internal clock feed from PPG1. • Data length : 7-bit (asynchronous normal mode only) or 8-bit. • Master/slave type communication functions (in multi-processor mode) . • Error detection functions (parity, framing, overrun) • Transfer signals are NRZ encoded. • µDMAC supported (for receiving/sending) |
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