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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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MB90F482 Scheda tecnica(PDF) 70 Page - fujitsu semiconductor |
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MB90F482 Scheda tecnica(HTML) 70 Page - fujitsu semiconductor |
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70 / 120 page  MB90480/485 Series 70 (3) Clock Feed Map 4 4 3 X0A X1A X0 HCLK MCLK UART0 CPU, µDMAC SCLK PCLK X1 φ 12 3 4 PPG0, PPG1 PPG2, PPG3 PPG4, PPG5 TIN0 TOT0 SCK0, SIN0 SOT0 SCK1, SCK2 SOT1, SOT2 OUT0, OUT1, OUT2, IN0, IN1 AN0 to AN7, ADTG CS0, CS1, FRCK IRQ0 to IRQ7 SIN1, SIN2 AIN0, AIN1 BIN0, BIN1 ZIN0, ZIN1 CS2, CS3 OUT3, OUT4, OUT5 Watchdog timer Oscillator stabilization wait control pin pin pin pin pins × 4 × 2 Clock selector PLL multiplier circuit Watch timer Timebase timer Sub clock generator circuit System clock generator circuit 8/16-bit PPG timer 0 8/16-bit PPG timer 1 8/16-bit PPG timer 2 16-bit reload timer 0 Chip select 16-bit output compare 16-bit free run timer 16-bit input capture 10-bit A/D converter pins pins pin pin pins pin pins pins pins pins pins pin pins HCLK : Oscillator clock MCLK : Main clock SCLK : Sub clock PCLK : PLL clock φ : Machine clock Peripheral functions Clock generator module pins pin Extended I/O serial interface, 2 channels 8/16-bit up/down counter External interrupt |
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