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ADL5309ACBZ-R7 Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte ADL5309ACBZ-R7
Spiegazioni elettronici  Dual, 188 dB Range, 10 pA to 25 mA, Logarithmic Converter
PDF  25 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADL5309ACBZ-R7 Scheda tecnica(HTML) 4 Page - Analog Devices

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Data Sheet
ADL5309
SPECIFICATIONS
analog.com
Rev. A | 4 of 25
Table 1. Specifications (Continued)
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
I2C INTERFACE
Pin B5 = SDA and Pin C5 = SCL
Input Low Voltage (VINL)
SDA and SCL input voltage at VCC = 3.0 V
0.9
V
Input High Voltage (VINH)
VCC = 3.0 V
1.8
5.5
V
Input Leakage Current (IIN)
VIN = 5 V and VCC = 3.0 V
0.2
μA
Input Leakage Current (IIN3V)
VIN = 5 V and VCC = 3.0 V
10
μA
Input Hysteresis (VHYST)
VIN = 5 V and VCC = 3.0 V
250
mV
Input Capacitance (CIN)
VIN = 5 V and VCC = 3.0 V
1
pF
Glitch Rejection
VIN = 5 V and VCC = 3.0 V
50
ns
SERIAL INTERFACE TIMING SPECIFICATIONS
Figure 2. I2C Timing Diagram
Table 2. Serial Interface Timing Specifications
Parameter
Description
Min
Typ
Max
Unit
fSCL(MAX) = 1/t1
Maximum SCL clock frequency
400
kHz
t2
Minimum SCL high period
50
600
ns
t3
Minimum SCL low period
0.65
1.3
μs
t4
Minimum hold time after (repeated) start condition
140
600
ns
t5
Minimum data setup time input
30
100
ns
t6
Minimum data hold time input
−100
0
ns
t6
Minimum data hold time output
300
600
900
ns
t7
Minimum repeated start condition setup time
30
600
ns
t8
Minimum stop condition setup time
30
600
ns
t9
Minimum bus free time between stop condition and start condition
0.12
1.3
μs
t10
SCL and SDA rise time
0.3
μs
t11
SCL and SDA fall time
0.3
μs
tSP(MAX)
Maximum suppressed spike pulse width
50
110
250
ns
CX
SCL and SDA input capacitance
5
10
pF



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