Data Sheet

ADL5309

SERIAL PORT INTERFACE

analog.com

Rev. A | 20 of 25

RESET, ADDRESS, AND ID REGISTERS

Table 7. ADL5309 RESET, ADDRESS, AND ID Registers Details

Address Name

Bits

Field Name

Description

Default

Access

0x00

REG_00

0

SOFTRESET

Writing '1' to this bit resets all registers to their default values.

0x0

R/W

0x01

REG_01

[6:0]

DEVICE_ADDRES

S

Active I2C device address, selected through the SBA pin. Voltage level. Refer to Table

1.

0x6X

R

0x0D

REG_0D

[7:0]

CHIP_ID

ID for ADL5309.

0x6C

R

ADC REGISTERS

The ADL5309 has a built-in 14-bit, 22 kSPS ADC that samples any

combination of three input data streams, including the following:

►

VOUT of Channel 1

►

VOUT of Channel 2

►

Built-in temperature sensor

Register REG_05 and Register REG_06 support streaming of the

ADC output words and behave differently from the other registers in

the map. By using the I2C read method with autoincrement to read

REG_05, multiple ADC samples can be read in a single operation.

If 2 bytes are read, then the MSB in REG_05 will be read first,

followed by the LSB in REG_06. If more than 2 bytes are read,

however, the address pointer is moved back to REG_05 and the

MSB of the next ADC sample is read. In this way, an autoincrement

read of 10 bytes starting from REG_05 will return five sequential

2-byte ADC words read from REG_05 and REG_06.

The ADC can digitize samples from up to three different input

streams, selected through the MUX_CTRL bit field in REG_04.

Writing a nonzero value to MUX_CTRL initiates the ADC multi-

stream, multisample read operation. One sample is digitized from

each active input stream at a time, then the next input stream is

digitized, starting with the active stream corresponding to the lowest

significant bit in MUX_CTRL. Thus in order to retrieve n samples

from a single input stream, a total of 2*n bytes need to be read. If

more than one input stream is selected the first active input stream

sample is repeated, and can be disregarded, bringing the total

bytes to read to 2*m*n+2, where m = number of input streams.

The performance using the ADC can be improved when using mul-

tiple samples to average and using the on-chip dither. Writing 0x1F

to REG_08 will enable 32-bit dither, and writing 0x2F to REG_08

will enable 64-bit dither. Writing 0x3F to REG_08 will enable both

32-bit and 64-bit dither bits. The default value of REG_08 is 0x03,

for which the dither is disabled.