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TMS320DM6446 Scheda tecnica(PDF) 47 Page - Texas Instruments |
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TMS320DM6446 Scheda tecnica(HTML) 47 Page - Texas Instruments |
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47 / 231 page ![]() www.ti.com TMS320DM6446 Digital Media System-on-Chip SPRS283E – DECEMBER 2005 – REVISED MARCH 2007 Table 2-23. PWM0, PWM1, PWM2 Terminal Functions SIGNAL TYPE(1) OTHER(2) DESCRIPTION NAME NO. PWM2 PWM2/ This pin is multiplexed between PWM2, VPBE, and GPIO. B2/ A15 I/O/Z DVDD18 For PWM2, it is output PWM2. GPIO47 PWM1 PWM1/ This pin is multiplexed between PWM1, VPBE, and GPIO. R2/ B15 I/O/Z DVDD18 For PWM1, it is output PWM1. GPIO46 PWM0 PWM0/ This pin is multiplexed between PWM0 and GPIO. C15 I/O/Z DVDD18 GPIO45 For PWM0, it is output PWM0. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) Specifies the operating I/O supply voltage for each signal Table 2-24. ATA/CF Terminal Functions SIGNAL TYPE(1) OTHER(2)(3) DESCRIPTION NAME NO. ATA/CF SPI_EN1/ This pin is multiplexed between SPI, ATA, and GPIO. HDDIR/ B2 I/O/Z DVDD18 For ATA, it is buffer direction control output HDDIR. GPIO42 GPIO50/ This pin is multiplexed between GPIO and ATA/CF. J5 O DVDD18 ATA_CS0 In ATA mode, it is ATA/CF chip select output ATA_CS0. GPIO51/ This pin is multiplexed between GPIO and ATA/CF. H1 O DVDD18 ATA_CS1 In ATA mode, it is ATA/CF chip select output ATA_CS1. EM_R/W/ This pin is multiplexed between EMIFA and ATA/CF. G3 I DVDD18 INTRQ For ATA/CF, it is interrupt request input INTRQ. EM_WAIT/ IPU This pin is multiplexed between EMIFA (NAND/SmartMedia/xD) and ATA/CF. (RDY/BSY)/ F1 I DVDD18 For ATA/CF, it is IO Ready input IORDY. IORDY EM_OE/ This pin is multiplexed between EMIFA (NAND/SmartMedia/xD) and ATA/CF. (RE)/ H4 O DVDD18 For CF, it is read strobe output (IORD). (IORD)/ For ATA, it is read strobe output DIOR. DIOR EM_WE This pin is multiplexed between EMIFA (NAND/SmartMedia/xD) and ATA/CF. (WE) G2 O DVDD18 For CF, it is write strobe output (IOWR). (IOWR)/ For ATA, it is write strobe output DIOW. DIOW DMACK/ This pin is multiplexed between ATA/CF and UART1. H3 O DVDD18 UART_TXD1 For ATA/CF, it is DMA acknowledge output DMACK. DMARQ/ IPD This pin is multiplexed between ATA/CF and UART1. G1 O UART_RXD1 DVDD18 For ATA/CF, it is DMA request DMARQ input. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-k Ω resistor should be used.) (3) Specifies the operating I/O supply voltage for each signal Submit Documentation Feedback Device Overview 47 |
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