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VNHD7012AYTR Scheda tecnica(PDF) 10 Page - STMicroelectronics |
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VNHD7012AYTR Scheda tecnica(HTML) 10 Page - STMicroelectronics |
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10 / 43 page ![]() Electrical specifications VNHD7012AY 10/43 DS11484 Rev 5 2.2 Thermal data VCP VCP DC voltage VBATT -6 to VBAT+14 V VGATE_LSx GATE_LAS, GATE_LSB DC voltage 12 V VREF_OVL_LSx VREF_OVL_LSA, VREF_OVL_LSB input current -1 to 10 V VESD Electrostatic discharge (Human body model: R = 1.5 kΩ; C = 100 pF) – MultiSenseVREG, VREF_OVL_LSx –INA, INB, OUTA, OUTB, PWM, SEL0, SEL1, SENSE_EN –GATE_LSx 2 4 4 kV Tc Junction operating temperature -40 to 150 °C TSTG Storage temperature -55 to 150 °C IK_SOURCE_LSx DC reverse ground pin current (per leg) 100 mA 1. This applies with the n-channel MOSFET used for the reverse battery protection. Otherwise VBAT has to be shorted to VCC. 2. Based on the internal wires capability. Note: All logic pins cannot be left floating but they must be connected to GND if unused. Table 4. Absolute maximum ratings (continued) Symbol Parameter Value Unit Table 5. Thermal data Symbol Parameter Max. value Unit Rthj-case Thermal resistance junction-case (per leg channel) (JEDEC JESD 51-8) 2.4 °C/W Rthj-amb Thermal resistance junction-ambient (JEDEC JESD 51-5)(1) 1. Device mounted on two-layers 2s0p PCB with 2 cm2 heatsink copper trace. 50.6 °C/W Rthj-amb Thermal resistance junction-ambient (JEDEC JESD 51-7) 16.6 °C/W |
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