VNHD7012AYTR datasheet(13/43 Pages) STMICROELECTRONICS

13 / 43 page

DS11484 Rev 5

13/43

VNHD7012AY

Electrical specifications

Table 8. HSD switching (VCC = 13 V; RLOAD = 1.6 Ω)

Symbol

Parameter

Test conditions

Min.

Typ. Max. Unit

td(on)

Turn-on delay time

Input rise time < 1 µs;

MultiSense_EN = 5 V (no

standby); SEL0,1 = 0; PWM = 0

(see Figure 6)

µs

td(off)

Turn-off delay time

Input rise time < 1 µs;

MultiSense_EN = 5 V (no

standby); SEL0,1 = 0; PWM = 0

(see Figure 6)

µs

Table 9. Gate driver for external MOS parameters (VCC = 13 V)

Symbol

Parameter

Test conditions

Min.

Typ. Max. Unit

f(1)

1. Parameter guaranteed by design.

PWM frequency

kHz

Vgs_lsd

Gate_LSD voltage

PWM = 5 V; INx = 0 V

VCC = 4 V, PWM = 5 V,

INx = 0 V, Tj=25 °C

tcross

Low-side turn-on delay time

Input rise time < 1 µs

(see Figure 7)

160

300

µs

tgr_ls

Rise time

VCC = 13.5 V; Rg = 0 Ω;

Cg = 4.7 nF

(see Figure 5)

0.25

0.5

µs

tgf_ls

Fall time

VCC = 13.5 V; Rg = 0 Ω;

Cg = 4.7 nF

(see Figure 5)

0.35

0.5

µs

Table 10. Protections and diagnostics (7 V < VCC < 18 V; -40 °C < Tj < 150 °C)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VUSD

Undervoltage shutdown

VCC falling

VUSDreset

Undervoltage shutdown reset VCC rising

VUSDhyst

Undervoltage shutdown

hysteresis

0.3

ILIM_HSD

High-side current limitation

VCC = 4 V, Tj = 25 °C (1)

VCL_HSD

High-side driver clamp

voltage (VCC to OUTA = 0 or

OUTB = 0)

IOUT = 100 mA;

tclamp = 1 ms;

Iclamp = 100 mA

VCL_LSD(1)

Low-side clamp voltage

(OUTA = VCC or OUTB = VCC

to GND)

IOUT = 100 mA;

tclamp = 1 ms;

Iclamp = 100 mA

tDEL_OVL_LSD

Low-side drain-current

overload blanking time

µs

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