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AS7225

UART Command Interface

Datasheet

• PUBLIC

DS000496

• v2-00 • 2019-Jun-28

│ 51

UART Command Interface

The UART block implements the TX and RX signals as defined in the RS-232 / V.24 standard

communication protocol. A SPI Flash is a required operating companion device for the AS7225 to

function or to communicate via the UART interface. Using non-verified flash devices can cause

communication issues and may not be compatible. See Figure 83 for a subset of supported devices,

which are tested by ams

. The “xx” in the serial flash name stands for alternative packages and a

reference is provided to the current list of verified flash devices. Flash timing is provided in Figure 81

and Figure 82 for debug purposes.

11.1.1

UART Feature List

●

Full Duplex Operation (Independent Serial Receive and Transmit Registers)

●

Factory set to 115.2 kBaud

●

Supports Serial Frames with 8 Data Bits, no Parity and 1 Stop Bit.

11.1.2

Operation

Transmission

If data is available, it will be moved into the output shift register and the data will be transmitted at the

Baud Rate, starting with a Start Bit (logic zero) and followed by a Stop Bit (logic one).

Reception

At any time, with the receiver being idle, if a falling edge of a Start Bit is detected on the input, a byte

will be received. The following Stop Bit will be checked to be logic one.

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