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R7KA8M2AFDCAM Scheda tecnica(PDF) 5 Page - Renesas Technology Corp

Il numero della parte R7KA8M2AFDCAM
Spiegazioni elettronici  Renesas Microcontrollers
PDF  295 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Table 1.8
Communication interfaces (1 of 2)
Feature
Functional description
Serial Communications Interface (SCI)
The Serial Communications Interface (SCI) × 10 channels have asynchronous and synchronous
serial interfaces:
● Asynchronous interfaces (UART and Asynchronous Communications Interface Adapter
(ACIA))
● 8-bit clock synchronous interface
● Simple IIC (master-only)
● Simple SPI
● Smart card interface
● Manchester interface
● Simple LIN interface
The smart card interface complies with the ISO/IEC 7816-3 standard for electronic signals and
transmission protocol. All channels have FIFO buffers to enable continuous and full-duplex
communication, and the data transfer speed can be configured independently using an on-chip
baud rate generator.
The maximum rate supported on this MCU. Refer to the electrical characteristics for the actual
rate.
I2C Bus interface (IIC)
The I2C Bus interface (IIC) has 3 channels. The IIC module conforms with and provides a subset
of the NXP I2C (Inter-Integrated Circuit) bus interface functions.
I3C Bus Interface (I3C)
The I3C Bus Interface (I3C) has 1 channel. The I3C module conform with and provide a subset
of the NXP I2C (Inter-Integrated Circuit) bus interface functions and a subset of the MIPI I3C.
Serial Peripheral Interface (SPI)
The Serial Peripheral Interface (SPI) provides high-speed full-duplex synchronous serial
communications with multiple processors and peripheral devices.
The maximum rate supported on this MCU. Refer to the electrical characteristics for the actual
rate.
Control Area Network with Flexible
Data-Rate Module (CANFD)
The CAN with Flexible Data-Rate (CANFD) module can handle classical CAN frames and
CANFD frames complied with ISO 11898-1 standard.
The module supports 4 transmit buffers per channel and 16 receive buffers per channel.
USB 2.0 Full-Speed module (USBFS)
The USB 2.0 Full-Speed module (USBFS) can operate as a host controller or device controller.
The module supports full-speed and low-speed (host controller only) transfer as defined in
Universal Serial Bus Specification 2.0. The module has an internal USB transceiver and supports
all of the transfer types defined in Universal Serial Bus Specification 2.0. The USB has buffer
memory for data transfer, providing a maximum of 10 pipes. Pipes 1 to 9 can be assigned any
endpoint number based on the peripheral devices used for communication or based on your
system.
USB 2.0 High-speed Module (USBHS)
The USB 2.0 High-Speed Module (USBHS) that operates as a host or a device controller
compliant with the Universal Serial Bus (USB) Specification revision 2.0. The host controller
supports USB 2.0 high-speed, full speed, and low-speed transfers, and the device controller
supports USB 2.0 high-speed and full-speed transfers.
The USBHS has an internal USB transceiver and supports all of the transfer types defined in the
USB 2.0 specification.
The USBHS has FIFO buffer for data transfers, providing a maximum of 10 pipes.
Octal Serial Peripheral Interface (OSPI)
The Octal Serial Peripheral Interface (OSPI) is a memory controller that supports Expanded
Serial Peripheral Interface (xSPI) (JEDEC Standard JESD251, JESD251-1 and JESD252). The
OSPI supports 1-bit, 2-bit, 4-bit and 8-bit protocols.
JESD251 specifies two interface profiles where profile 1.0 is Octal SPI and profile 2.0 is
HyperBusTM (HyperRAMTM and HyperFlashTM). OSPI supports QSPI protocol.
Serial Sound Interface Enhanced (SSIE) The Serial Sound Interface Enhanced (SSIE) peripheral provides functionality to interface with
digital audio devices for transmitting I2S/Monaural/TDM audio data over a serial bus. The SSIE
supports an audio clock frequency of up to 50 MHz, and can be operated as a slave or master
receiver, transmitter, or transceiver to suit various applications. The SSIE includes 32-stage FIFO
buffers in the receiver and transmitter, and supports interrupts and DMA-driven data reception
and transmission.
SD/MMC Host Interface (SDHI)
The Secure Digital (SD) Card and Multi Media Card (MMC) Host Interface provides the
functionality required to connect a variety of external memory cards to the MCU. The SDHI
supports both 1- and 4-bit buses for connecting memory cards that support SD, SDHC, and
SDXC formats. When developing host devices that are compliant with the SD Specifications,
you must comply with the SD Host/Ancillary Product License Agreement (SD HALA). The MMC
interface supports 1-bit, 4-bit, and 8-bit MMC buses that provide eMMC 4.51 (JEDEC Standard
JESD 84-B451) device access. This interface also provides backward compatibility and supports
high-speed SDR transfer modes.
RA8M2 Datasheet
1. Overview
R01DS0438EJ0130 Rev.1.30
Feb 27, 2026
Page 5 of 295



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