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R7KA8M2AFDCAM Scheda tecnica(PDF) 119 Page - Renesas Technology Corp

Il numero della parte R7KA8M2AFDCAM
Spiegazioni elettronici  Renesas Microcontrollers
PDF  295 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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Table 2.48
Operation frequency value in high-speed mode (8 of 8)
Parameter
Symbol
Min
Typ
Max
Unit
Operation
frequency
SCI clock (SCICLK)
f
—
—
120
MHz
SPI clock (SPICLK)
—
—
333
Octal SPI clock (OCTACLK)
—
—
333
CANFD core clock (CANFDCLK)
—
—
80
ADC clock (ADCCLK)
25
—
120
GPT clock (GPTCLK)
—*1
—
300
USB clock (USBCLK)
—
—
48
USB clock (USB60CLK)
—
—
60
I3C clock (I3CCLK)
—
—
200
Asynchronous external bus clock (BCLKA)
—
—
133
EtherSW clock
(ESWCLK)
BGA package
—
—
250
HLQFP package
—
—
125
EtherSW-PHY clock (ESWPHYCLK)
—
—
500
Note 1. When the GPTCLK is used for A/D conversion clock, the GPTCLK frequency must be at least 25 MHz.
2.3.2
Clock Timing
Table 2.49
Clock timing except for sub-clock oscillator (1 of 2)
Parameter
Symbol
Min
Typ
Max
Unit
Test conditions
EBCLK pin output cycle
time
VCC = 2.70 V or above tBcyc
16.6
—
—
ns
Figure 2.25
VCC = 1.62 V or above
33.3
—
—
EBCLK pin output high
pulse width
VCC = 2.70 V or above tCH
3.3
—
—
ns
VCC = 1.62 V or above
9.6
—
—
EBCLK pin output low pulse
width
VCC = 2.70 V or above tCL
3.3
—
—
ns
VCC = 1.62 V or above
9.6
—
—
EBCLK pin output rise time
VCC = 2.70 V or above tCr
—
—
5.0
ns
VCC = 1.62 V or above
—
—
7.0
EBCLK pin output fall time
VCC = 2.70 V or above tCf
—
—
5.0
ns
VCC = 1.62 V or above
—
—
7.0
SDCLK pin output cycle time
tSDcyc
7.52
—
—
ns
SDCLK pin output high pulse width
tCH
1.0
—
—
ns
SDCLK pin output low pulse width
tCL
1.0
—
—
ns
SDCLK pin output rise time
tCr
—
—
2.7
ns
SDCLK pin output fall time
tCf
—
—
2.7
ns
EXTAL external clock input cycle time
tEXcyc
20.80
—
—
ns
Figure 2.26
EXTAL external clock input high pulse width
tEXH
5.30
—
—
ns
EXTAL external clock input low pulse width
tEXL
5.30
—
—
ns
EXTAL external clock rise time
tEXr
—
—
3.0
ns
EXTAL external clock fall time
tEXf
—
—
3.0
ns
Main clock oscillator frequency
fMAIN
8
—
48
MHz
—
Main clock oscillation stabilization wait time
(crystal)*1
tMAINOSCW
T
—
—
—*1
ms
Figure 2.27
RA8M2 Datasheet
2. Electrical Characteristics
R01DS0438EJ0130 Rev.1.30
Feb 27, 2026
Page 119 of 295



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