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R7KA8M2AFDCAM Scheda tecnica(PDF) 133 Page - Renesas Technology Corp

Il numero della parte R7KA8M2AFDCAM
Spiegazioni elettronici  Renesas Microcontrollers
PDF  295 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R7KA8M2AFDCAM Scheda tecnica(HTML) 133 Page - Renesas Technology Corp

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Table 2.56
Bus timing (2 of 3)
Condition 1: When using the CS area controller (CSC).
VCC = VCC_DCDC = VBATT = 1.62 V to 3.6 V, VCC2 = 1.62 V to 3.63 V
BCLK = 8 to 120 MHz, BCLKA = 8 to 120 MHz, EBCLK = 8 to 60 MHz (When VCC = VCC_USB = VBATT = 2.70 to 3.63 V)
BCLK = BCLKA = 8 to 60 MHz, EBCLK = 8 to 30 MHz (When VCC = VCC_USB = VBATT = 1.62 to 3.63 V)
Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 30 pF
EBCLK: High drive output is selected in the port drive capability bit in the PmnPFS register.
Others: Middle drive output is selected in the port drive capability bit in the PmnPFS register.
Condition 2: When using the SDRAM area controller (SDRAMC).
BCLK = SDCLK = 8 to 125 MHz, BCLKA = SDCLK = 8 to 133 MHz
VCC = VCC_DCDC = VBATT = 3.0 to 3.63 V, VCC2 = 1.62 V to 3.63V
Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 15 pF
SDCLK: High-speed high drive output is selected in the port drive capability bit in the PmnPFS register.
Others: High drive output is selected in the port drive capability bit in the PmnPFS register.
Condition 3: When using the SDRAM area controller (SDRAMC) and CS area controller (CSC) simultaneously.
BCLK = SDCLK = 8 to 66 MHz, BCLKA = SDCLK = 8 to 66 MHz
VCC = VCC_DCDC = VBATT = 3.0 to 3.63 V, VCC2 = 1.62 V to 3.63V
Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 15 pF
EBCLK/SDCLK: High drive output is selected in the port drive capability bit in the PmnPFS register.
Others: Middle drive output is selected in the port drive capability bit in the PmnPFS register.
Parameter
Condition
VCC/VCC2
Symbol
Min
Max
Unit
Test conditions
Write data hold time
Condition1
2.70 V or above
tWDH
1.0
—
ns
Figure 2.38 to Figure
2.44
1.62 V or above
1.0
—
ns
Condition3
3.0 V or above
1.0
10.8
ns
WAIT setup time
Condition1
2.70 V or above
tWTS
12.5
—
ns
1.62 V or above
20.5
—
ns
Condition3
3.0 V or above
10.8
—
ns
WAIT hold time
Condition1
2.70 V or above
tWTH
0
—
ns
1.62 V or above
0
—
ns
Condition3
3.0 V or above
0
—
ns
RA8M2 Datasheet
2. Electrical Characteristics
R01DS0438EJ0130 Rev.1.30
Feb 27, 2026
Page 133 of 295



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