R7KA8M2AFECAC datasheet(4/295 Pages) RENESAS

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Table 1.5

Direct memory access (2 of 2)

Feature

Functional description

DMA Controller (DMAC)

The 8-channel direct memory access controller (DMAC) that can transfer data without

intervention from the CPU. When a DMA transfer request is generated, the DMAC transfers

data stored at the transfer source address to the transfer destination address.

Table 1.6

External bus interface

Feature

Functional description

External buses

● CS area (ECBI): Connected to the external devices (external memory interface)

● SDRAM area (ECBI): Connected to the SDRAM (external memory interface)

● OSPI0 area (OSPI0BI): Connected to the OSPI0 (external device interface)

● OSPI1 area (OSPI1BI): Connected to the OSPI1 (external device interface)

Table 1.7

Timers

Feature

Functional description

General PWM Timer (GPT)

The General PWM Timer (GPT) is a 32-bit timer with GPT32 × 14 channels. PWM waveforms

can be generated by controlling the up-counter, down-counter, or the up- and down-counter. In

addition, PWM waveforms can be generated for controlling brushless DC motors. The GPT can

also be used as a general-purpose timer.

PWM Delay Generation Circuit (PDG)

The PWM Delay Generation circuit (PDG) has 4 channels delay circuits that can connect to the

GPT. The PDG can control the rise and fall edge timing with which the PWM output for the

GPT320 through the GPT323.

Port Output Enable for GPT (POEG)

The Port Output Enable (POEG) function can place the General PWM Timer (GPT) output pins

in the output disable state

Low Power Asynchronous General

Purpose Timer (AGT)

The Low Power Asynchronous General Purpose Timer (AGT) is a 16-bit timer that can be used

for pulse output, external pulse width or period measurement, and counting external events. This

timer consists of a reload register and a down counter. The reload register and the down counter

are allocated to the same address, and can be accessed with the AGT register.

Ultra-Low-Power Timer (ULPT)

The Ultra-Low-Power Timer (ULPT) is a 32-bit timer which can be used for outputting pulses or

counting external events. This 32-bit timer consists of reload registers and a down-counter. The

reload registers and the down-counter are allocated to the same address and can be accessed

through the ULPTCNT register.

Realtime Clock (RTC)

The realtime clock (RTC) has two counting modes, calendar count mode and binary count mode,

that are used by switching register settings. For calendar count mode, the RTC has a 100-year

calendar from 2000 to 2099 and automatically adjusts dates for leap years. For binary count

mode, the RTC counts seconds and retains the information as a serial value. Binary count mode

can be used for calendars other than the Gregorian (Western) calendar.

Watchdog Timer (WDT)

The Watchdog Timer (WDT) is a 14-bit down counter that can be used to reset the MCU when

the counter underflows because the system has run out of control and is unable to refresh the

WDT. In addition, the WDT can be used to generate a non-maskable interrupt or an underflow

interrupt.

Independent Watchdog Timer (IWDT)

The Independent Watchdog Timer (IWDT) has a 14-bit down-counter, which resets the MCU

by a reset output when the down-counter underflows. Alternatively, generation of an interrupt

request when the counter underflows can be selected. This enables detection of a program

runaway taking the refresh interval into account. The IWDT has two start modes: auto start

mode, in which counting automatically starts after release from the reset state, and register start

mode, in which counting is started by refreshing (writing to a specific register).

RA8M2 Datasheet

1. Overview

R01DS0438EJ0130 Rev.1.30

Feb 27, 2026

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