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R7KA8M2AFECAC Scheda tecnica(PDF) 83 Page - Renesas Technology Corp |
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R7KA8M2AFECAC Scheda tecnica(HTML) 83 Page - Renesas Technology Corp |
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83 / 295 page ![]() Table 2.35 Coremark and normal mode current, CPU0 Deep Sleep, CPU1 active. (DCDC mode and External VDD mode) (1 of 2) Parameter Symbol Typ Max Uni t Test conditions 95 °C 105 °C 125 °C Supply current*1 *2 CPUCLK1 = 250 MHz VSCR_1 VCL = voltage range 1 Coremark Cache on IDD 215 — — — μA/ MH z CPU0 = Deep Sleep ESWM power domain off CPUCLK0 = 1 GHz, MRICLK = 250 MHz, MRPCLK = 15.6 MHz, ICLK = 250 MHz, PCLKA = 15.6 MHz, PCLKB = 15.6 MHz, PCLKC = 15.6 MHz, PCLKD = 15.6 MHz, PCLKE = 15.6 MHz, BCLK = 15.6 MHz Cache off, executing from ITCM 197 — — — Cache off, executing from SRAM 194 — — — Cache off, executing from MRAM 268 — — — Normal mode All peripheral disabled, Cache on, while (1) code 201 — — — All peripheral disabled, Cache off, while (1) code executing from MRAM 264 — — — CPUCLK1 = 200 MHz VSCR_1 VCL = voltage range 1 Coremark Cache on 236 — — — μA/ MH z CPU0 = Deep Sleep ESWM power domain off CPUCLK0 = 800 MHz, MRICLK = 200 MHz, MRPCLK = 12.5 MHz, ICLK = 200 MHz, PCLKA = 12.5 MHz, PCLKB = 12.5 MHz, PCLKC = 12.5 MHz, PCLKD = 12.5 MHz, PCLKE = 12.5 MHz, BCLK = 12.5 MHz Cache off, executing from ITCM 218 — — — Cache off, executing from SRAM 215 — — — Cache off, executing from MRAM 299 — — — Normal mode All peripheral disabled, Cache on, while (1) code 222 — — — All peripheral disabled, Cache off, while (1) code executing from MRAM 297 — — — RA8M2 Datasheet 2. Electrical Characteristics R01DS0438EJ0130 Rev.1.30 Feb 27, 2026 Page 83 of 295 |
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